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參數資料
| 型號： | ML53812-2 |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP176 |
| 封裝： | LQFP-176 |
| 文件頁數： | 56/64頁 |
| 文件大小： | 668K |
| 代理商： | ML53812-2 |
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s ML53812-2 s ––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
2
Oki Semiconductor
2.0 FEATURES
2.1 Applications
Low and high-density computer telephony hardware (PCI and cPCI platforms)
Enhanced service platforms
Private branch exchanges (PBXs)
Wireless base stations
Internet telephony systems
Digital trunking equipment
High functionality, low cost implementation of
the ECTF H.100/H.110 interoperability
specifications.
Simple to connect PCI and cPCI board-level
circuitry to the universally accepted CT Bus.
Ultra slim profiling (176-pin LQFP package).
Up to 512 programmable connections (256
transmit and 256 receive) to any of the 4096
time slots on the H.100/H.110 CT Bus.
8-channel stream-to-stream switching for data
stream connections at variable rates.
Implementation of all compatibility signals for
complete interoperability with existing 4 MHz
SCbus, 8 MHz SCbus, 2 MHz MVIP-90
devices, and H-MVIP.
Provides reliable clock synchronization for
network-grade connection to digital network
interfaces.
Supports all H.100/H.110 CT Bus clock fallback
features.
Choice of constant or minimum switching
delay on a per time slot basis.
3.3 V I/O with 5 V tolerant input.
Supports multiplexed and nonmultiplexed
address/data bus modes for both Intel and
Motorola microprocessors.
Supports CT Bus optional message channel
interface, for both H.100 (PCI) and H.110 (cPCI)
applications.
Supports a variety of framing formats via a
configurable local bus.
Efficient microprocessor interface access to
Local and CT Bus data streams through direct
parallel access to/from transmit and receive
switch.
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| ML53812-2TC | 制造商:ROHM Semiconductor 功能描述: |
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