參數(shù)資料
型號: ML53812-2
廠商: OKI ELECTRIC INDUSTRY CO LTD
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PQFP176
封裝: LQFP-176
文件頁數(shù): 29/64頁
文件大小: 668K
代理商: ML53812-2
––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––– s ML53812-2 s
31
Oki Semiconductor
Configuration Register Byte 15, AR = 000fh
DR_0
C
Definition
0
120
CT Bus A Error Latch Clear
1
121
CT Bus B Error Latch Clear
2
122
SCbus Error Latch Clear
3
123
MVIP Error Latch Clear
4
124
Master PLL Error Latch Clear
5
125
Frame Boundary Latch Clear
6
126
Reserved
7
127
Reserved
CT Bus A Error Latch Clear (C_ [120]) (Read/Write)
0
CT Bus A Error Latch Enabled
1
CT Bus A Error Latch held clear (Default)
CT Bus B Error Latch Clear (C_ [121]) (Read/Write)
0
CT Bus B Error Latch Enabled
1
CT Bus B Error Latch held clear (Default)
SCbus Error Latch Clear (C_ [122]) (Read/Write)
0
SCbus Error Latch Enabled
1
SCbus Error Latch held clear (Default)
MVIP Error Latch Clear (C_ [123]) (Read/Write)
0
MVIP Error Latch Enabled
1
MVIP Error Latch held clear (Default)
Master PLL Error Latch Clear (C_ [124]) (Read/Write)
0
Master PLL Error Latch Enabled
1
Master PLL Error Latch held clear (Default)
Frame Boundary Latch Clear (C_ [125]) (Read/Write)
0
Frame Boundary Latch Enabled
1
Frame Boundary Latch held clear (Default)
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