參數(shù)資料
型號： ML53812-2
廠商： OKI ELECTRIC INDUSTRY CO LTD
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PQFP176
封裝： LQFP-176
文件頁數(shù)： 40/64頁
文件大?。?/td> 668K
代理商： ML53812-2
––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––– s ML53812-2 s
41
Oki Semiconductor
6.8 Transmit Switch Routing Registers, AR = 20ffh:2000h (Ch. 255:0)
Note: To ensure compatibility with subsequent versions of this device, write “0” to all "Reserved" bits in the
routing registers. All "Reserved" routing registers read-back "0".
Note: Internally all time-slots run at 8Mb/s. To transmit on CT_D data streams running at a slower rate, use
the following conversion:
If CT_D data stream is operating at 4Mb/s, transmit switch output time-slot = CT_D time-slot X 2.
If CT_D data stream is operating at 2Mb/s, transmit switch output time-slot = CT_D time-slot X 4.
DR_0
Definition
[6:0]
Output Time-slot
7
Reserved (write zero)
Output Time-slot [6:0] (Read/Write)
Selects the CT_D time-slot for transmit channel routing.
00h
→
Time-slot 0 (Default)
01h
→
Time-slot 1
02h
→
Time-slot 2
7eh
→
Time-slot 126
7fh
→
Time-slot 127
DR_1
Definition
[4:0]
Output Data Stream
[6:5]
Reserved (write zero)
7
Output Enable
Output Data Stream [4:0] (Read/Write)
Selects the CT_D Data stream for transmit channel routing.
00h
→
CT_D_[0] (Default)
01h
→
CT_D_[1]
02h
→
CT_D_[2]
1eh
→
CT_D_[30]
1fh
→
CT_D_[31]
Output Enable (Read/Write)
Controls the Output Enable for the selected CT Bus data stream and time-slot.
0
→
Output Disabled (Default)
1
→
Output Enabled
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