參數(shù)資料
型號(hào): ML53812-2
廠商: OKI ELECTRIC INDUSTRY CO LTD
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PQFP176
封裝: LQFP-176
文件頁數(shù): 10/64頁
文件大小: 668K
代理商: ML53812-2
s ML53812-2 s ––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
14
Oki Semiconductor
6.2 Command/Status Register
Note: For "Reads" that do not require synchronization (all "Reads" except In-Direct Parallel Access Read) it is
not necessary to set this bit. The Data Registers can be read immediately after writing the Address Register.
D_[7:0]
Definition
0
Busy (Read Only)
1
Read Command (Write Only)
2
Write Command (Write Only)
3
Terminate Command (Write Only)
4
Reserved
5
Reserved
6
Reserved
7
Reset (Read/Write)
Busy (D_0) (Read Only)
This bit is set ("1") when a Command that requires synchronization with the ML53812-2's internal state machine has been initiated, and cleared ("0")
when the command has been completed.
For Commands that do not require synchronization this bit is always clear ("0").
The following commands require synchronization:
Routing Memory Write command
In-Direct Parallel Access Read or Write command
Read (D_1) (Write Only)
Setting this bit ("1") initiates a synchronized read of the register pointed to by the Address Register. When the Busy bit is clear ("0"), the contents of
the register to be read are available by reading the Data Register. It is NOT necessary to clear ("0") this bit after it has been set ("1").
Write (D_2) (Write Only)
Setting this bit ("1") initiates a write of the register pointed to by the Address Register. It is NOT necessary to clear ("0") this bit after it has been set ("1").
Terminate (D_3) (Write Only)
Setting this bit ("1") terminates a command that requires synchronization with the ML53812-2's internal state machine. The command in process is
completed asynchronously and the Busy bit is cleared. It is NOT necessary to clear ("0") this bit after it has been set ("1").
Reset (D_7) (Read/Write)
Setting this bit ("1") resets the ML53812-2 and initializes the Configuration and Routing Registers. This command is analogous to the function of the
RESET pin. Clearing this bit ("0") returns the ML53812-2 to normal operation, ready to be configured.
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