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參數(shù)資料
| 型號(hào)： | ML53812-2 |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP176 |
| 封裝： | LQFP-176 |
| 文件頁數(shù)： | 15/64頁 |
| 文件大?。?/td> | 668K |
| 代理商： | ML53812-2 |
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s ML53812-2 s ––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
18
Oki Semiconductor
Configuration Register Byte 2, AR = 0002h
DR_0
C
Definition
0
16
Master CT Enable
1
17
Master CT A/B Select
2
18
Reserved
3
19
Advance Master PLL Timing
4
20
Master Manual/Auto Mode
5
21
Master Primary/Secondary Select
6
22
Master Primary/Secondary Read-back
7
23
Reserved
Master CT Enable (C_ [16]) (Read/Write)
Enables the Master PLL to drive the CT Bus.
0
→
Master Disabled (Default)
1
→
Master Enabled
Master CT A/B Select (C_ [17]) (Read/Write) [1]
1.
When in Secondary Master mode, the signal set (A or B) NOT selected here is used as the reference.
Selects the signal set driven by the Master PLL.
0
→
CT_C8_A & CT_FRAME_A (Default)
1
→
CT_C8_B & CT_FRAME_B
Advance Master PLL Timing (C_ [19]) (Read/Write)
When operating as secondary master, the master PLL timing may be advanced one 7.6 ns clock period to compensate for delay.
Set to 0 for normal operation.
0
→
Advance Master PLL Timing Disabled (Default)
1
→
Advance Master PLL Timing Enabled
Master Manual/Auto Mode (C_ [20]) (Read/Write) [1]
1.
Master Auto mode allows Secondary Master to become Primary if an error occurs on the reference signal set. To switch back to Secondary Master
it is necessary to go into manual mode.
0
→
Master Manual Mode (Default)
1
→
Master Auto Mode
Master Primary/Secondary Select (C_ [21]) (Read/Write)
0
→
Primary Master Select (Default)
1
→
Secondary Master Select
Master Primary/Secondary Read-back (C_ [22]) (Read Only)
0
→
Primary Master Selected
1
→
Secondary Master Selected
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