參數(shù)資料
型號(hào): MFRC53001T
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡(luò)
英文描述: ISO-IEC 14443 A Reader IC
封裝: MFRC53001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 5, 2005,;MFRC53001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1
文件頁數(shù): 51/115頁
文件大?。?/td> 2590K
代理商: MFRC53001T
MFRC530_33
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NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.3 — 6 July 2010
057433
51 of 115
NXP Semiconductors
MFRC530
ISO/IEC 14443 A Reader IC
10.5.2
Page 1: Control and status
10.5.2.1
Page register
Selects the page register; see
Section 10.5.1.1 “Page register” on page 46
.
10.5.2.2
Control register
Various control flags, for timer, power saving, etc.
Table 55.
Bit
Symbol
Access
Table 56.
Bit
7 to 6
5
[1]
This bit can only be set to logic 1 by successful execution of the Authent2 command
[2]
Reading this bit always returns logic 0
Control register (address: 09h) reset value: 0000 0000b, 00h bit allocation
7
6
5
4
00
StandBy
PowerDown
Crypto1On
R/W
D
D
3
2
1
0
TStopNow
W
TStartNow
W
FlushFIFO
W
D
Control register bit descriptions
Symbol
Value
00
-
StandBy
1
Description
reserved
activates Standby mode. The current consuming blocks are
switched off but the clock keeps running
activates Power-down mode. The current consuming blocks
are switched off including the clock
Crypto1 unit is switched on and all data communication with
the card is encrypted
[1]
Crypto1 unit is switched off. All data communication with the
card is unencrypted (plain)
immediately stops the timer
[2]
immediately starts the timer
[2]
immediately clears the internal FIFO buffer’s read and write
pointer, the FIFOLength[6:0] bits are set to logic 0 and the
FIFOOvfl flag
[2]
4
PowerDown
1
3
Crypto1On
1
0
2
1
0
TStopNow
TStartNow
FlushFIFO
1
1
1
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