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參數資料
| 型號： | MFRC50001T |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 通信及網絡 |
| 英文描述： | Highly integrated ISO-IEC 14443 A reader IC |
| 封裝： | MFRC50001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 15, 2005,; |
| 文件頁數： | 37/110頁 |
| 文件大?。?/td> | 841K |
| 代理商： | MFRC50001T |
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MFRC500_33
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.3 — 15 March 2010
048033
37 of 110
NXP Semiconductors
MFRC500
Highly Integrated ISO/IEC 14443 A Reader IC
10. MFRC500 registers
10.1 Register addressing modes
Three methods can be used to operate the MFRC500:
initiating functions and controlling data by executing commands
configuring the functional operation using a set of configuration bits
monitoring the state of the MFRC500 by reading status flags
The commands, configuration bits and flags are accessed using the microprocessor
interface. The MFRC500 can internally address 64 registers using six address lines.
10.1.1
Page registers
The MFRC500 register set is segmented into eight pages contain eight registers each. A
Page register can always be addressed, irrespective of which page is currently selected.
10.1.2
Dedicated address bus
When using the MFRC500 with the dedicated address bus, the microprocessor defines
three address lines using address pins A0, A1 and A2. This enables addressing within a
page. To switch between registers in different pages a paging mechanism needs to be
used.
Table 28
shows how the register address is assembled.
Table 28.
Register bit: UsePageSelect
1
10.1.3
Multiplexed address bus
The microprocessor may define all six address lines at once using the MFRC500 with a
multiplexed address bus. In this case either the paging mechanism or linear addressing
can be used.
Table 29
shows how the register address is assembled.
Table 29.
Multiplexed
address bus
type
Paging mode
Linear
addressing
Dedicated address bus: assembling the register address
Register address
PageSelect2
PageSelect1
PageSelect0
A2
A1
A0
Multiplexed address bus: assembling the register address
UsePage
Select
Register address
1
0
PageSelect2 PageSelect1
AD5
PageSelect0
AD3
AD2
AD2
AD1 AD0
AD1 AD0
AD4
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| MFRC50001T/0FE,112 | 功能描述:RFID應答器 MIFARE READER RoHS:否 制造商:Murata 存儲容量:512 bit 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
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| MFRC52201HN1 | 功能描述:RFID應答器 CL READER IC’S RoHS:否 制造商:Murata 存儲容量:512 bit 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
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