參數(shù)資料
型號: MFRC50001T
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Highly integrated ISO-IEC 14443 A reader IC
封裝: MFRC50001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 15, 2005,;
文件頁數(shù): 26/110頁
文件大小: 841K
代理商: MFRC50001T
MFRC500_33
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NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.3 — 15 March 2010
048033
26 of 110
NXP Semiconductors
MFRC500
Highly Integrated ISO/IEC 14443 A Reader IC
To ensure correct detection of the microprocessor interface, the following sequence is
executed:
the Command register is read until the 6-bit register value is 00h. On reading the 00h
value, the internal initialization phase is complete and the MFRC500 is ready to be
controlled
write 80h to the Page register to initialize the microprocessor interface
read the Command register. If it returns a value of 00h, the microprocessor interface
was successfully initialized
write 00h to the Page registers to activate linear addressing mode.
9.8 Oscillator circuit
The clock applied to the MFRC500 acts as a time basis for the synchronous system
encoder and decoder. The stability of the clock frequency is an important factor for correct
operation. To obtain highest performance, clock jitter must be as small as possible. This is
best achieved by using the internal oscillator buffer with the recommended circuitry.
If an external clock source is used, the clock signal must be applied to pin OSCIN. In this
case, be very careful in optimizing clock duty cycle and clock jitter. Ensure the clock
quality has been verified. It must meet the specifications described in
Section 13.4.4 on
page 90
.
Remark:
We do not recommend using an external clock source.
Fig 9.
Quartz clock connection
001aak614
13.56 MHz
15 pF
15 pF
OSCOUT
OSCIN
DEVICE
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