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參數(shù)資料
| 型號： | MCZ33989EG |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 元件分類： | CAN |
| 英文描述： | System Basis Chip with High-Speed CAN Transceiver |
| 中文描述： | 系統(tǒng)基礎(chǔ)芯片高高速CAN收發(fā)器 |
| 文件頁數(shù)： | 29/66頁 |
| 文件大小： | 1181K |
| 代理商： | MCZ33989EG |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
29
33989
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Figure 16. Simplified State Machine in Debug Modes
LOGIC COMMANDS AND REGISTERS
SPI INTERFACE AND REGISTER DESCRIPTION
Table 7
illustrates a register, an 8-bit SPI. The first three
bits are used to identify the internal SBC register address. Bit
four is a read/write bit. The last four bits are
Data Send
from
MCU to SBC, or read back from SBC to MCU.
There is no significance during write operation state of
MISO.
During read operation only the final four bits of MISO have
a meaning (content of the accessed register).
The following tables describe the SPI register list, and
register bit meaning.
Registers reset value is also described along with the reset
condition. Reset condition is the condition causing the bit to
be set at the reset value.
Read operation: R/W Bit = 0
Write operation: R/W Bit = 1
Possible reset conditions include:
S
W
Wake-up
Normal Request
Stand-by Debug
S
Normal
WD: Trigger
Stand-by
SPI: Stand-by Debug
S
S
SP:Noma Debug
Reset
Reset Counter
(3.4 ms) Expired
WD: Time-out 350 ms
&
&
SPI: Normal Debug
Normal Debug
SP:SandbyDebug
Stop Debug
S
Wakeup
E
S
H
Wake-up
R
R
R
R
R
R
R
R
(1) If Stop mode entered, it is entered without watchdog, no matter the WDSTOP bit.
(E) Debug mode entry point (Step 5 of the Debug mode entering sequence).
(R) Represents transitions to Reset mode due to V
DD1
low.
Sleep
Stop (1)
Table 7. Data Format Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
A2
A1
A0
R/W
D3
D2
D1
D0
SBC Reset:
Power-On Reset POR
SBC Mode Transition: NR2R - Normal Request to Reset Mode
NR2N - Normal Request to Normal Mode
NR2STB - Normal Request to Standby
Mode
N2R - Normal to Reset Mode
STB2R - Standby to Reset Mode
STO2R - Stop to Reset Mode
STO2NR - Stop to Normal Request
SBC Mode:
RESET - SBC in Reset Mode
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCZ33989EG | 制造商:Freescale Semiconductor 功能描述:IC SYSTEM BASIS W/CAN TRANCEIVER |
| MCZ33989EGR2 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC SBC-HS RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| MCZ33990EF | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC CLASS B SERIAL TRANS. RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| MCZ33990EF | 制造商:Freescale Semiconductor 功能描述:TRANCEIVER J-1850 CLASS B 8SOIC |
| MCZ33990EF/R2 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Enhanced Class B Serial Transceiver |
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