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參數(shù)資料
型號： MCR705JP7CDWE
廠商： Freescale Semiconductor
文件頁數(shù)： 147/164頁
文件大?。?/td> 0K
描述： MCU 8BIT 224B RAM 28-SOIC
標準包裝： 26
系列： HC05
核心處理器： HC05
芯體尺寸： 8-位
速度： 2.1MHz
連通性： SIO
外圍設(shè)備： POR，溫度傳感器，WDT
輸入/輸出數(shù)： 22
程序存儲器容量： 6KB（6K x 8）
程序存儲器類型： OTP
RAM 容量： 224 x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 28-SOIC（0.295"，7.50mm 寬）
包裝： 管件
A/D Conversion Methods
MC68HC705JJ7 MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
Freescale Semiconductor
83
The full scale voltage range for a given capacitance, fOSC, conversion method, and resolution is defined
as:
VFS = NFS x P x ICHG / (CEXT x fOSC)
Once charged to a given voltage, a finite amount of time will be required to discharge the capacitor back
to its start voltage at VSS. This discharge time will be solely based on the value of capacitance used and
the sinking current of the internal discharge device. To allow a reasonable time for the capacitor to return
to VSS levels, the discharge time should last about 10 milliseconds per microfarad of capacitance
attached to the PB0 pin. If the total charge/discharge cycle time is critical, then the discharge time should
be at least 1/10 of the most recent charge time. Shorter discharge times may be used if lesser accuracy
in the voltage measurement is acceptable.
NOTE
Sufficient time should be allowed to discharge the external capacitor or
subsequent charge times will be shortened with resultant errors in timing
conversion.
Table 8-4 gives the range of values of each parameter in the A/D timing conversion and Table 8-5 gives
some A/D conversion examples for several bit resolutions.
The mode selection bits in the ACR allow four methods of single-slope A/D conversion. Each of these
methods is shown in Figure 8-8 through Figure 8-11 using the signal names and parameters given in
Manual start and stop (mode 0) Figure 8-8
Manual start and automatic discharge (mode 1) Figure 8-9
Automatic start and stop from TOF to ICF (mode 2) Figure 8-10
Automatic start and stop from OCF to ICF (mode 3) Figure 8-11
Table 8-4. A/D Conversion Parameters
Name
Function
Min
Typ
Max
Units
VX
Unknown voltage on channel selection bus
VSS
—
VDD –1.5
V
VMAX
Maximum charging voltage on external capacitor
—
VDD –1.5
V
ICHG
Charging current on external ramping capacitor
VDD = 3 Vdc
VDD = 5 Vdc
IDIS
Discharge current on external ramping capacitor
tCHG
Time to charge external capacitor
(100 kHz < fOSC < 4.0 MHz)
4-bit result
6-bit result
8-bit result
10-bit result
12-bit result
0.032
0.128
0.512
2.048
8.192
0.128
0.512
2.048
8.196
32.768
2.56
10.24
40.96
120(1)
ms
tDIS
Time to discharge external capacitor, CEXT
—5
10
ms
/F
CEXT
Capacitance of external ramping capacitor
0.0001
0.1
2.0
F
N
Number of counts for ICHG to charge CEXT to VX
1
1024
65536
Counts
Continued on next page
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