
CONTENTS
Paragraph
Number
Title
Page
Number
MOTOROLA
Contents
ix
6.2.4
6.2.5
6.2.6
6.2.7
6.2.8
6.2.8.1
6.2.8.2
6.2.8.3
6.2.8.4
System Protection Register (SPR).................................................................. 6-6
Power Management Register (PMR).............................................................. 6-7
Activate Low-Power Register (ALPR)......................................................... 6-10
Device Identification Register (DIR)............................................................ 6-11
Software Watchdog Timer............................................................................ 6-12
Watchdog Reset Reference Register (WRRR)......................................... 6-13
Watchdog Interrupt Reference Register (WIRR)..................................... 6-13
Watchdog Counter Register (WCR)......................................................... 6-14
Watchdog Event Register (WER)............................................................. 6-14
Chapter 7
Interrupt Controller
7.1
7.2
7.2.1
7.2.2
7.2.2.1
7.2.2.2
7.2.2.3
7.2.2.4
7.2.3
7.2.4
7.2.5
7.2.6
Overview............................................................................................................. 7-1
Interrupt Controller Registers............................................................................. 7-2
Interrupt Controller Registers......................................................................... 7-3
Interrupt Control Registers (ICR1–ICR4) ...................................................... 7-4
Interrupt Control Register 1 (ICR1) ........................................................... 7-4
Interrupt Control Register 2 (ICR2) ........................................................... 7-5
Interrupt Control Register 3 (ICR3) ........................................................... 7-5
Interrupt Control Register 4 (ICR4) ........................................................... 7-6
Interrupt Source Register (ISR)...................................................................... 7-6
Programmable Interrupt Transition Register (PITR)...................................... 7-7
Programmable Interrupt Wakeup Register (PIWR)........................................ 7-7
Programmable Interrupt Vector Register (PIVR)........................................... 7-8
Chapter 8
Chip Select Module
8.1
8.1.1
8.1.2
8.1.3
8.2
8.2.1
8.2.2
Overview............................................................................................................. 8-1
Features........................................................................................................... 8-1
Chip Select Usage........................................................................................... 8-1
Boot CS0 Operation........................................................................................ 8-2
Chip Select Registers.......................................................................................... 8-2
Chip Select Base Registers (CSBR0–CSBR7)............................................... 8-3
Chip Select Option Registers (CSOR0–CSOR7) ........................................... 8-5
Chapter 9
SDRAM Controller
9.1
9.2
Overview............................................................................................................. 9-1
SDRAM Controller Signals................................................................................ 9-1