
xvi
MCF5272 User’s Manual
MOTOROLA
CONTENTS
Paragraph
Number
Title
Page
Number
16.3.13
16.3.14
16.3.15
16.3.16
16.3.17
16.4
16.5
16.5.1
16.5.1.1
16.5.1.2
16.5.1.2.1
16.5.1.2.2
16.5.1.2.3
16.5.2
16.5.2.1
16.5.2.2
16.5.2.3
16.5.2.4
16.5.3
16.5.3.1
16.5.3.2
16.5.3.3
16.5.4
16.5.5
16.5.5.1
16.5.5.2
16.5.5.3
16.5.6
16.5.6.1
UART Transmitter FIFO Registers (UTFn)............................................... 16-15
UART Receiver FIFO Registers (URFn) ................................................... 16-16
UART Fractional Precision Divider Control Registers (UFPDn).............. 16-17
UART Input Port Registers (UIPn) ............................................................ 16-18
UART Output Port Command Registers (UOP1n/UOP0n) ....................... 16-18
UART Module Signal Definitions.................................................................. 16-19
Operation......................................................................................................... 16-20
Transmitter/Receiver Clock Source............................................................ 16-20
Programmable Divider............................................................................ 16-20
Calculating Baud Rates........................................................................... 16-21
CLKIN Baud Rates............................................................................. 16-21
External Clock.................................................................................... 16-22
Autobaud Detection............................................................................ 16-22
Transmitter and Receiver Operating Modes............................................... 16-23
Transmitting ........................................................................................... 16-23
Receiver.................................................................................................. 16-25
Transmitter FIFO.................................................................................... 16-26
Receiver FIFO ....................................................................................... 16-26
Looping Modes........................................................................................... 16-28
Automatic Echo Mode............................................................................ 16-28
Local Loop-Back Mode.......................................................................... 16-28
Remote Loop-Back Mode....................................................................... 16-29
Multidrop Mode.......................................................................................... 16-29
Bus Operation............................................................................................. 16-31
Read Cycles............................................................................................ 16-31
Write Cycles ........................................................................................... 16-31
Interrupt Acknowledge Cycles............................................................... 16-31
Programming .............................................................................................. 16-31
UART Module Initialization Sequence.................................................. 16-32
Chapter 17
General Purpose I/O Module
17.1
17.2
17.2.1
17.2.2
17.2.3
17.2.4
17.3
17.3.1
17.3.2
Overview........................................................................................................... 17-1
Port Control Registers....................................................................................... 17-2
Port A Control Register (PACNT)................................................................ 17-2
Port B Control Register (PBCNT)................................................................ 17-5
Port C Control Register................................................................................. 17-8
Port D Control Register (PDCNT)................................................................ 17-8
Data Direction Registers................................................................................... 17-9
Port A Data Direction Register (PADDR).................................................. 17-10
Port B Data Direction Register (PBDDR).................................................. 17-10