
xiv
MCF5272 User’s Manual
MOTOROLA
CONTENTS
Paragraph
Number
Title
Page
Number
13.5.5
13.5.6
13.5.7
13.5.8
13.5.9
13.5.10
13.5.11
13.5.12
13.5.13
13.5.14
13.5.15
13.5.16
13.5.17
13.5.18
13.5.19
13.5.20
13.5.21
13.5.22
13.6
13.6.1
13.6.2
13.6.2.1
13.6.2.2
13.6.3
13.6.4
13.6.5
B2 Data Transmit Registers (P0B2TR–P3B2TR)...................................... 13-17
D Data Transmit Registers (P0DTR–P3DTR)............................................ 13-18
Port Configuration Registers (P0CR–P3CR).............................................. 13-19
Loopback Control Register (PLCR)........................................................... 13-20
Interrupt Configuration Registers (P0ICR–P3ICR).................................... 13-21
Periodic Status Registers (P0PSR–P3PSR)................................................ 13-22
Aperiodic Status Register (PASR).............................................................. 13-24
GCI Monitor Channel Receive Registers (P0GMR–P3GMR)................... 13-24
GCI Monitor Channel Transmit Registers (P0GMT–P3GMT).................. 13-25
GCI Monitor Channel Transmit Abort Register (PGMTA) ...................... 13-26
GCI Monitor Channel Transmit Status Register (PGMTS)........................ 13-27
GCI C/I Channel Receive Registers (P0GCIR–P3GCIR).......................... 13-28
GCI C/I Channel Transmit Registers (P0GCIT–P3GCIT)......................... 13-29
GCI C/I Channel Transmit Status Register (PGCITSR) ............................ 13-29
D-Channel Status Register (PDCSR) ......................................................... 13-30
D-Channel Request Register (PDRQR)...................................................... 13-31
Sync Delay Registers (P0SDR–P3SDR) .................................................... 13-32
Clock Select Register (PCSR) .................................................................... 13-32
Application Examples..................................................................................... 13-33
Introduction................................................................................................. 13-33
PLIC Initialization ...................................................................................... 13-34
Port Configuration Example................................................................... 13-34
Interrupt Configuration Example............................................................ 13-35
Example 1: ISDN SOHO PBX with Ports 0, 1, 2, and 3............................ 13-36
Example 2: ISDN SOHO PBX with Ports 1, 2, and 3................................ 13-39
Example 3: Two-Line Remote Access with Ports 0 and 1......................... 13-40
Chapter 14
Queued Serial Peripheral Interface (QSPI) Module
14.1
14.2
14.3
14.3.1
14.3.2
14.4
14.4.1
14.4.1.1
14.4.1.2
14.4.1.3
14.4.2
14.4.3
Overview........................................................................................................... 14-1
Features............................................................................................................. 14-1
Module Description .......................................................................................... 14-1
Interface and Pins.......................................................................................... 14-2
Internal Bus Interface.................................................................................... 14-3
Operation........................................................................................................... 14-3
QSPI RAM.................................................................................................... 14-4
Receive RAM ........................................................................................... 14-5
Transmit RAM.......................................................................................... 14-6
Command RAM........................................................................................ 14-6
Baud Rate Selection...................................................................................... 14-6
Transfer Delays............................................................................................. 14-7