參數(shù)資料
型號(hào)： S29GL032N90BFI32
廠商： SPANSION LLC
元件分類： PROM
英文描述： 2M X 16 FLASH 3V PROM, 90 ns, PBGA48
封裝： 8.15 X 6.15 MM, LEAD FREE, FBGA-48
文件頁(yè)數(shù)： 53/81頁(yè)
文件大小： 3095K
代理商： S29GL032N90BFI32
October 29, 2008 S29GL-N_01_12
S29GL-N MirrorBit Flash Family
57
Data
She e t
10.13 DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete,
or whether the device entered the Erase Suspend mode. Toggle Bit I may be read at any address, and is
valid after the rising edge of the final WE# pulse in the command sequence (prior to the program or erase
operation), and during the sector erase time-out.
During an Embedded Program or Erase algorithm operation, successive read cycles to any address cause
DQ6 to toggle. The system may use either OE# or CE# to control the read cycles. When the operation is
complete, DQ6 stops toggling.
After an erase command sequence is written, if all sectors selected for erasing are protected, DQ6 toggles for
approximately 100 s, then returns to reading array data. If not all selected sectors are protected, the
Embedded Erase algorithm erases the unprotected sectors, and ignores the selected sectors that are
protected.
The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing or is erase-
suspended. When the device is actively erasing (that is, the Embedded Erase algorithm is in progress), DQ6
toggles. When the device enters the Erase Suspend mode, DQ6 stops toggling. However, the system must
also use DQ2 to determine which sectors are erasing or erase-suspended. Alternatively, the system can use
If a program address falls within a protected sector, DQ6 toggles for approximately 1 s after the program
command sequence is written, then returns to reading array data.
DQ6 also toggles during the erase-suspend-program mode, and stops toggling once the Embedded Program
algorithm is complete.
Table 10.5 on page 60 shows the outputs for Toggle Bit I on DQ6. Figure 10.6 on page 58 shows the toggle
bit algorithm. Figure 15.9 on page 70 shows the toggle bit timing diagrams. Figure 15.10 on page 70 shows
the differences between DQ2 and DQ6 in graphical form. See also the subsection on DQ2: Toggle Bit II
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