
143
42073A-MCU Wireless-02/13
ATmega2564/1284/644RFR2
This register contains the lower 8 bits of the CSMA_SEED. The upper 3 bits are part of
register CSMA_SEED_1. CSMA_SEED is the seed for the random number generation
that determines the length of the back-off period in the CSMA-CA algorithm. It is
recommended to initialize registers CSMA_SEED by random values. This can be done
using the bits RND_VALUE of register PHY_RSSI.
Bit 7:0 – CSMA_SEED_07:00 - Seed Value for CSMA Random Number
Generator
These bits contain the bits [7:0] of the CSMA_SEED.
9.12.52 CSMA_SEED_1 – Transceiver Acknowledgment Frame Control Register 2
Bit
7
6
NA ($16E)
AACK_FVN_MODE1
AACK_FVN_MODE0
CSMA_SEED_1
Read/Write
RW
Initial Value
0
1
Bit
5
4
NA ($16E)
AACK_SET_PD
AACK_DIS_ACK
CSMA_SEED_1
Read/Write
RW
Initial Value
0
Bit
3
2
NA ($16E)
AACK_I_AM_COORD
CSMA_SEED_12
CSMA_SEED_1
Read/Write
RW
Initial Value
0
Bit
1
0
NA ($16E)
CSMA_SEED_11
CSMA_SEED_10
CSMA_SEED_1
Read/Write
RW
Initial Value
1
0
This register is a control register for RX_AACK and contains a part of the CSMA_SEED
for the CSMA-CA algorithm.
Bit 7:6 – AACK_FVN_MODE1:0 - Acknowledgment Frame Filter Mode
The frame control field of the MAC header (MHR) contains a frame version subfield.
The setting of AACK_FVN_MODE specifies the frame filtering behavior of the radio
transceiver. According to the content of these register bits the radio transceiver passes
frames with a specific frame version number, number group or independent of the
frame version number. Thus the register bits AACK_FVN_MODE define the maximum
acceptable frame version. Received frames with a higher frame version number than
configured do not pass the address filter and are not acknowledged.
Table 9-76 AACK_FVN_MODE Register Bits
Register Bits
Value
Description
AACK_FVN_MODE1:0
0
Acknowledge frames with version number 0
1
Acknowledge frames with version number 0
or 1
2
Acknowledge frames with version number 0
or 1 or 2
3
Acknowledge frames independent of frame
version number