
225
42073A-MCU Wireless-02/13
ATmega2564/1284/644RFR2
PCINT4, Pin Change Interrupt source 4: The PB4 pin can serve as an external interrupt
source.
MISO/PDO/PCINT3 – Port B, Bit 3
MISO: Master Data input, Slave Data output pin for SPI channel. When the SPI is
enabled as a master, this pin is configured as an input regardless of the setting of
DDB3. When the SPI is enabled as a slave, the data direction of this pin is controlled by
DDB3. When the pin is forced to be an input, the pull-up can still be controlled by the
PORTB3 bit.
PDO, SPI Serial Programming Data Output. During Serial Program Downloading, this
details).
PCINT3, Pin Change Interrupt source 3: The PB3 pin can serve as an external interrupt
source.
MOSI/PDI/PCINT2 – Port B, Bit 2
MOSI: SPI Master Data output, Slave Data input for SPI channel. When the SPI is
enabled as a slave, this pin is configured as an input regardless of the setting of DDB2.
When the SPI is enabled as a master, the data direction of this pin is controlled by
DDB2. When the pin is forced to be an input, the pull-up can still be controlled by the
PORTB2 bit.
PDI, SPI Serial Programming Data Input. During Serial Program Downloading, this pin
PCINT2, Pin Change Interrupt source 2: The PB2 pin can serve as an external interrupt
source.
SCK/PCINT1 – Port B, Bit 1
SCK: Master Clock output, Slave Clock input pin for SPI channel. When the SPI is
enabled as a slave, this pin is configured as an input regardless of the setting of DDB1.
When the SPI0 is enabled as a master, the data direction of this pin is controlled by
DDB1. When the pin is forced to be an input, the pull-up can still be controlled by the
PORTB1 bit.
PCINT1, Pin Change Interrupt source 1: The PB1 pin can serve as an external interrupt
source.
SS
/PCINT0 – Port B, Bit 0
SS
: Slave Port Select input. When the SPI is enabled as a slave, this pin is configured
as an input regardless of the setting of DDB0. As a slave, the SPI is activated when this
pin is driven low. When the SPI is enabled as a master, the data direction of this pin is
controlled by DDB0. When the pin is forced to be an input, the pull-up can still be
controlled by the PORTB0 bit.
SLAVE OUTPUT constitute the MISO signal, while MOSI is divided into SPI MSTR
OUTPUT and SPI SLAVE INPUT.
PCINT0, Pin Change Interrupt source 0: The PB0 pin can serve as an external interrupt
source.
Table 14-4. Overriding Signals for Alternate Functions in PB7:PB4
Signal
Name
PB7/OC0A/OC1C
PB6/OC1B
PB5/OC1A
PB4/OC2A
PUOE
0