參數(shù)資料
型號: MC705C9ACPE
廠商: Freescale Semiconductor
文件頁數(shù): 56/118頁
文件大小: 0K
描述: IC MCU 2.1MHZ 16K OTP 40-DIP
標準包裝: 9
系列: HC05
核心處理器: HC05
芯體尺寸: 8-位
速度: 2.1MHz
連通性: SCI,SPI
外圍設備: POR,WDT
輸入/輸出數(shù): 24
程序存儲器容量: 16KB(16K x 8)
程序存儲器類型: OTP
RAM 容量: 352 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
Resets
MC68HC05C9A Advance Information Data Sheet, Rev. 4.1
42
Freescale Semiconductor
COPF — Computer Operating Properly Flag
Reading the COP control register clears COPF.
1 = COP or clock monitor reset has occurred.
0 = No COP or clock monitor reset has occurred.
CME — Clock Monitor Enable Bit
This bit is readable any time, but may be written only once.
1 = Clock monitor enabled
0 = Clock monitor disabled
COPE — COP Enable Bit
This bit is readable any time. COPE, CM1, and CM0 together may be written with a single write, only
once, after reset. This bit is cleared by reset.
1 = COP enabled
0 = COP disabled
CM1 — COP Mode Bit 1
Used in conjunction with CM0 to establish the COP timeout period, this bit is readable any time. COPE,
CM1, and CM0 together may be written with a single write, only once, after reset. This bit is cleared by
reset.
CM0 — COP Mode Bit 0
Used in conjunction with CM1 to establish the COP timeout period, this bit is readable any time. COPE,
CM1, and CM0 together may be written with a single write, only once, after reset. This bit is cleared by
reset.
Bits 7–5 — Not Used
These bits always read as 0.
5.6 MC68HC05C12A Compatible COP
This COP is implemented with an 18-bit ripple counter. This provides a timeout period of 64 milliseconds
at a bus rate (fop) of 2 MHz. If the COP should time out, a system reset will occur and the device will be
re-initialized in the same fashion as a power-on reset or reset.
$001E
Bit 7
654321
Bit 0
Read:
0
COPF
CME
COPE
CM1
CM0
Write:
Reset:
000
U
0000
= Unimplemented
U = Undetermined
Figure 5-5. COP Control Register (COPCR)
Table 5-1. COP Timeout Period
CM1
CM0
fop/2
15 Divide By
Timeout Period
(fosc = 2.0 MHz)
Timeout Period
(fosc = 4.0 MHz)
0
1
32.77 ms
16.38 ms
0
1
4
131.07 ms
65.54 ms
1
0
16
524.29 ms
262.14 ms
1
64
2.097 sec
1.048 sec
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