參數(shù)資料
型號： MC705C9ACPE
廠商： Freescale Semiconductor
文件頁數(shù)： 49/118頁
文件大?。?/td> 0K
描述： IC MCU 2.1MHZ 16K OTP 40-DIP
標(biāo)準(zhǔn)包裝： 9
系列： HC05
核心處理器： HC05
芯體尺寸： 8-位
速度： 2.1MHz
連通性： SCI，SPI
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 24
程序存儲器容量： 16KB（16K x 8）
程序存儲器類型： OTP
RAM 容量： 352 x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 40-DIP（0.600"，15.24mm）
包裝： 管件
Interrupts
MC68HC05C9A Advance Information Data Sheet, Rev. 4.1
36
Freescale Semiconductor
4.3 External Interrupt (IRQ or Port B)
If the interrupt mask bit (I bit) of the CCR is set, all maskable interrupts (internal and external) are disabled.
Clearing the I bit enables interrupts. The interrupt request is latched immediately following the falling edge
of IRQ. It is then synchronized internally and serviced as specified by the contents of $3FFA and $3FFB.
When any of the port B pullups are enabled, each pin becomes an additional external interrupt source
which is executed identically to the IRQ pin. Port B interrupts follow the same edge/edge-level selection
as the IRQ pin. The branch instructions BIL and BIH also respond to the port B interrupts in the same way
as the IRQ pin. See 7.3 Port B.
Either a level-sensitive and edge-sensitive trigger or an edge-sensitive-only trigger operation is
selectable. In MC68HC05C9A mode, the sensitivity is software controlled by the IRQ bit in the C9A option
register ($3FDF). In the MC68HC05C12A mode, the sensitivity is determined by the C12IRQ bit in the
C12 mask option register ($3FF1).
NOTE
The internal interrupt latch is cleared in the first part of the interrupt service
routine; therefore, one external interrupt pulse can be latched and serviced
as soon as the I bit is cleared.
Table 4-1. Vector Addresses for Interrupts and Resets
Function
Source
Local Mask
Global Mask
Priority
(1 = Highest)
Vector
Address
Reset
Power-on reset
None
1
$3FFE–$3FFF
RESET pin
COP watchdog
Software
interrupt
(SWI)
User code
None
Same priority
as instruction
$3FFC–$3FFD
External
interrupt
IRQ pin port B pins
None
I bit
2
$3FFA–$3FFB
Timer
interrupts
ICF bit
ICIE bit
I bit
3
$3FF8–$3FF9
OCF bit
OCIE bit
TOF bit
TOIE bit
SCI
interrupts
TDRE bit
TCIE bit
I bit
4
$3FF6–$3FF7
TC bit
RDRF bit
RIE bit
OR bit
IDLE bit
ILIE bit
SPI
interrupts
SPIF bit
SPIE
I bit
5
$3FF4–$3FF5
MODF bit
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