參數(shù)資料
型號(hào)： MC68HC05BD7P
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40
封裝： DIP-40
文件頁數(shù)： 70/85頁
文件大?。?/td> 302K
代理商： MC68HC05BD7P
MOTOROLA
SECTION 12: A/D CONVERTER
Page 62
GENERAL RELEASE SPECIFICATION
MC68HC05BD7 Rev. 2.0
PRELIMINARY
12.3
Registers
12.3.1
ADC Control/status Register
This read/write register, located at address $14, contains six control bits and one status bit.
RESULT - Comparator Status Bit (Read Only)
When set, D/A output
≥ ANALOG IN.
When clear, D/A output
≥ ANALOG IN.
AD5:0 - A/D Digital Result
These bits are written by the user to perform successive
approximations in software. When a value causes the
RESULT bit to change state from the value immediately
before or after it, AD5:0 are considered to be the digital
equivalent of the analog input. Note that when AD5:0 are all
1’s,
ADC
is
virtually
turned
off
to
minimize
power
consumption.
12.3.2
ADC Channel Register
The ADC Channel Register, located at address $15 contains only two bits.
CHSL1:CHSL0 - Channel select bits
These two bit will select one of the four ADC input channels
as
analog
input
source.
Following
table
shows
its
configuration.
CHSL1:CHSL0 = 0 : 0 ==> ADC0
CHSL1:CHSL0 = 0 : 1 ==> ADC1
CHSL1:CHSL0 = 1 : 0 ==> ADC2
CHSL1:CHSL0 = 1 : 1 ==> ADC3
0
7
0000000
6543210
W
R
ADCSR
$0014
reset
RESULT
AD5
AD4
AD3
AD2
AD1
AD0
0
7
0000000
6543210
W
R
ADCCR
$0015
reset
CHSL1
CHSL0
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