參數(shù)資料
型號： MC68EN302PV25BT
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 4 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP144
封裝： 20 X 20 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, PLASITC, LQFP-144
文件頁數(shù)： 117/128頁
文件大小： 641K
代理商： MC68EN302PV25BT
IEEE 1149.1 (JTAG) Test Access Port
7-4
MOTOROLA
All MC68EN302 bidirectional pins have a single register bit in the boundary scan register for
pin data and are controlled by an associated control bit in this register. Fifty bits in the bound-
ary scan register define the output enable signal for associated groups of bidirectional and
three-stateable output pins. The control bits and their bit positions are listed in Table 7-1.
The boundary scan bit definitions are listed in Table 7-2.
The first column in the table defines the bit’s ordinal position in the boundary scan register.
The shift register cell nearest TDO (i.e., first to be shifted out) is defined as bit 0; the last bit
to be shifted out is 162.
The second column references one of the seven MC68EN302 cell types depicted in Figure
7-3 through Figure 7-9, which describe the cell structure for each type.
The third column lists the pin name for all pin-related cells or defines the name of bidirec-
tional control register bits.
The fourth column lists the pin type for convenience, where Output indicates a three-state-
able output pin, I/O indicates a bidirectional pin and Input represents an input.
The last column indicates the associated boundary scan register control bit for bidirectional
and output pins.
Bidirectional pins include a single scan cell for data (bicell) as depicted in Figure 7-6. These
bits are controlled by the cell shown in Figure 7-5. The value of the control bit determines
whether the bidirectional pin is an input or an output. One or more bidirectional data cells
Table 7-1. Boundary Scan Control Bits
Name
Bit Number
Name
Bit Number
Name
Bit Number
out_enb
0
ras1_enb
86
berrb_out
125
drv_ext_a
5
oeb_enb
88
CLKO_enb
130
drv_ext_d
32
wehb_enb
90
drv_ext_cntl
133
rena_enb
54
welb_enb
92
drv_ext_uds
137
rx_enb
56
paritye_enb
94
cas0_enb
139
pa0_enb
62
parity_enb
96
cas1_enb
141
txd2_enb
64
cd3_enb
101
dram_rw_enb
143
pa2_enb
66
txd1_enb
105
pb3_enb
145
pa3_enb
68
tclk1_enb
107
a0_enb
147
pa4_enb
70
rclk1_enb
109
pb5_enb
149
pa5_enb
72
dtack_enb
111
pb6_enb
151
pa6_enb
74
ecpt_buf
113
wdogb_enb
153
pa8_enb
76
bgack_enb
115
pb8_enb
155
txd3_enb
78
br_enb
117
pb9_enb
157
pa10_enb
80
haltb_out
119
pb10_enb
159
pa11_enb
82
resetb_out
121
pb11_enb
161
ras0_enb
84
avec_enb
123
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