參數(shù)資料
型號(hào)： MC56F8355MFG60
廠商： MOTOROLA INC
元件分類： 數(shù)字信號(hào)處理
英文描述： 4-BIT, 120 MHz, OTHER DSP, PQFP128
封裝： LQFP-128
文件頁數(shù)： 64/152頁
文件大小： 2224K
代理商： MC56F8355MFG60
56F8355 Signal Pins
56F8355 Technical Data
19
Preliminary
RXD1
(GPIOD7)
41
Input
Input/
Output
Input
Receive Data — SCI1 receive data input
Port D GPIO — This GPIO pin can be individually
programmed as an input or output pin.
After reset, the default state is SCI input.
To deactivate the internal pull-up resistor, clear bit 7 in the
GPIOD_PUR register.
TCK
115
Schmitt
Input
Input,
pulled low
internally
Test Clock Input — This input pin provides a gated clock
to synchronize the test logic and shift serial data to the
JTAG/EOnCE port. The pin is connected internally to a
pull-down resistor.
TMS
116
Schmitt
Input
Input,
pulled high
internally
Test Mode Select Input — This input pin is used to
sequence the JTAG TAP controller’s state machine. It is
sampled on the rising edge of TCK and has an on-chip
pull-up resistor.
To deactivate the internal pull-up resistor, set the JTAG bit
in the SIM_PUDR register.
TDI
117
Schmitt
Input
Input,
pulled high
internally
Test Data Input — This input pin provides a serial input
data stream to the JTAG/EOnCE port. It is sampled on the
rising edge of TCK and has an on-chip pull-up resistor.
To deactivate the internal pull-up resistor, set the JTAG bit
in the SIM_PUDR register.
TDO
118
Output
Tri-stated
Test Data Output — This tri-stateable output pin provides
a serial output data stream from the JTAG/EOnCE port. It
is driven in the shift-IR and shift-DR controller states, and
changes on the falling edge of TCK.
TRST
114
Schmitt
Input
Input,
pulled high
internally
Test Reset — As an input, a low signal on this pin
provides a reset signal to the JTAG TAP controller. To
ensure complete hardware reset, TRST should be
asserted whenever RESET is asserted. The only
exception occurs in a debugging environment when a
hardware device reset is required and the JTAG/EOnCE
module must not be reset. In this case, assert RESET, but
do not assert TRST.
To deactivate the internal pull-up resistor, set the JTAG bit
in the SIM_PUDR register.
Table 2-2 56F8355 Signal and Package Information for the 128-Pin LQFP
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
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參數(shù)描述
MC56F8355MFGE 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
MC56F8355VFG60 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Hybrid Controllers
MC56F8355VFGE 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 16 BIT HYBRID CNTRLR RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
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MC56F8356MFV60 制造商:Rochester Electronics LLC 功能描述:- Bulk
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