參數(shù)資料
型號: MC56F8355MFG60
廠商: MOTOROLA INC
元件分類: 數(shù)字信號處理
英文描述: 4-BIT, 120 MHz, OTHER DSP, PQFP128
封裝: LQFP-128
文件頁數(shù): 3/152頁
文件大小: 2224K
代理商: MC56F8355MFG60
100
56F8355 Technical Data
Preliminary
Figure 6-5 SIM Software Control Register 0 (SIM_SCR0)
6.5.3.1
Software Control Data 1 (FIELD)—Bits 15–0
This register is reset only by the Power-On Reset (POR). It has no part-specific functionality and
is intended for use by a software developer to contain data that will be unaffected by the other reset
sources (RESET pin, software reset, and COP reset).
6.5.4
Most Significant Half of JTAG ID (SIM_MSH_ID)
This read-only register displays the most significant half of the JTAG ID for the chip. This register
reads $01F4.
Figure 6-6 Most Significant Half of JTAG ID (SIM_MSH_ID)
6.5.5
Least Significant Half of JTAG ID (SIM_LSH_ID)
This read-only register displays the least significant half of the JTAG ID for the chip. This register
reads $601D.
Figure 6-7 Least Significant Half of JTAG ID (SIM_LSH_ID)
6.5.6
SIM Pull-up Disable Register (SIM_PUDR)
Most of the pins on the chip have on-chip pull-up resistors. Pins which can operate as GPIO can
have these resistors disabled via the GPIO function. Non-GPIO pins can have their pull-ups
disabled by setting the appropriate bit in this register. Disabling pull-ups is done on a
peripheral-by-peripheral basis (for pins not muxed with GPIO). Each bit in the register (see
Figure 6-8) corresponds to a functional group of pins. See Table 2-2 to identify which pins can
deactivate the internal pull-up resistor.
Base + $2
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
FIELD
Write
RESET
0
0000
0
Base + $6
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
0
1
0
1
0
Write
RESET
0
0000
0
1
0
1
0
Base + $7
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
0
1
0
1
0
1
Write
RESET
0
1
1000
0
1
0
1
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