參數(shù)資料
型號: MC56F8355MFG60
廠商: MOTOROLA INC
元件分類: 數(shù)字信號處理
英文描述: 4-BIT, 120 MHz, OTHER DSP, PQFP128
封裝: LQFP-128
文件頁數(shù): 144/152頁
文件大?。?/td> 2224K
代理商: MC56F8355MFG60
Register Descriptions
56F8355 Technical Data
91
Preliminary
5.6.21.1
IRQ Pending (PENDING)—Bits 64–49
This register combines with the other five to represent the pending IRQs for interrupt vector
numbers 2 through 81.
0 = IRQ pending for this vector number
1 = No IRQ pending for this vector number
5.6.22
IRQ Pending 4 Register (IRQP4)
Figure 5-24 IRQ Pending 4 Register (IRQP4)
5.6.22.1
IRQ Pending (PENDING)—Bits 80–65
This register combines with the other five to represent the pending IRQs for interrupt vector
numbers 2 through 81.
0 = IRQ pending for this vector number
1 = No IRQ pending for this vector number
5.6.23
IRQ Pending 5 Register (IRQP5)
Figure 5-25 IRQ Pending Register 5 (IRQP5)
5.6.23.1
Reserved—Bits 96–82
This bit field is reserved or not implemented. The bits are read as 1 and cannot be modified by
writing.
5.6.23.2
IRQ Pending (PENDING)—Bit 81
This register combines with the other five to represent the pending IRQs for interrupt vector
numbers 2 through 81.
0 = IRQ pending for this vector number
1 = No IRQ pending for this vector number
Base + $15
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
PENDING [80:65]
Write
RESET
11111111
Base + $16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
1
PEND-
ING
[81]
Write
RESET
11
11111
1111
1
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