參數(shù)資料
型號: MAX5898EGK+D
廠商: Maxim Integrated Products
文件頁數(shù): 5/33頁
文件大小: 0K
描述: IC DAC 16BIT DUAL 500MSPS 68-QFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 30
設(shè)置時(shí)間: 11ns
位數(shù): 16
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
功率耗散(最大): 831mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 68-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 68-QFN 裸露焊盤(10x10)
包裝: 管件
輸出數(shù)目和類型: 2 電流,單極
采樣率(每秒): 500M
MAX5898
16-Bit, 500Msps, Interpolating and Modulating
Dual DAC with Interleaved LVDS Inputs
______________________________________________________________________________________
13
AVCLK, DVDD3.3, and DVDD1.8), which minimize noise
coupling from one supply to the other. AVDD1.8 and
DVDD1.8 operate from a typical 1.8V supply, and all
other supply inputs operate from a typical 3.3V supply.
Serial Interface
The SPI-compatible serial interface programs the
MAX5898 registers. The serial interface consists of CS,
DIN, SCLK, and DOUT. Data is shifted into DIN on the
rising edge of SCLK when CS is low. When CS is high,
data presented at DIN is ignored and DOUT is in high-
impedance mode. Note:
CS must transition high
after each read/write operation. DOUT is the serial
data output for reading registers to facilitate easy
debugging during development. DIN and DOUT can
be connected together to form a 3-wire serial interface
bus or remain separate and form a 4-wire SPI bus.
The serial interface supports two-byte transfer in a
communication cycle. The first byte is a control byte
written to the MAX5898 only. The second byte is a data
byte and can be written to or read from the MAX5898.
When writing to the MAX5898, data is shifted into DIN;
data is shifted out of DOUT in a read operation. Bits 0 to
3 of the control byte are the address bits. These bits set
the address of the register to be written to or read from.
Bits 4 to 6 of the control byte must always be set to 0.
Bit 7 is a read/write bit: 0 for write operation and 1 for
read operation. The most significant bit (MSB) is shifted
in first in default mode. If the serial port is set to LSB-first
mode, both the control byte and data byte are shifted LSB
first. Figures 1 and 2 show the SPI serial-interface opera-
tion in the default write and read mode, respectively.
Figure 3 is a timing diagram for the SPI serial interface.
Table 1. Quadrature Modulator Operating Data Rates (fIM is the Data Rate at the Input of
the Modulator)
INTERPOLATION RATE
MODULATION MODE (fLO)
MODULATION FREQUENCY
RELATIVE TO fDAC
MODULATION FREQUENCY
RELATIVE TO fDATA
fIM / 2
fDAC / 2
fDATA / 2
1x
fIM / 4
fDAC / 4
fDATA / 4
fIM / 2
fDAC / 2
fDATA
2x
fIM / 4
fDAC / 4
fDATA / 2
fIM / 2
fDAC / 2
2 x fDATA
4x
fIM / 4
fDAC / 4
fDATA
fIM / 2
fDAC / 4
2 x fDATA
8x
fIM / 4
fDAC / 8
fDATA
Figure 1. SPI Serial-Interface Write Cycle, MSB-First Mode
0
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
CS
SCLK
DIN
DOUT
HIGH IMPEDANCE
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