參數(shù)資料
型號： MAX5898EGK+D
廠商： Maxim Integrated Products
文件頁數(shù)： 30/33頁
文件大?。?/td> 0K
描述： IC DAC 16BIT DUAL 500MSPS 68-QFN
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 30
設(shè)置時(shí)間： 11ns
位數(shù)： 16
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 831mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 68-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 68-QFN 裸露焊盤（10x10）
包裝： 管件
輸出數(shù)目和類型： 2 電流，單極
采樣率（每秒）： 500M
MAX5898
16-Bit, 500Msps, Interpolating and Modulating
Dual DAC with Interleaved LVDS Inputs
6
_______________________________________________________________________________________
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Clock Supply Voltage
AVCLK
3.135
3.3
3.465
V
AVDD3.3
3.135
3.3
3.465
Analog Supply Voltage
AVDD1.8
1.71
1.8
1.89
V
IAVDD3.3
fCLK = 250MHz, 2x interpolation, 0dBFS,
fOUT = 10MHz
111
130
Analog Supply Current
IAVDD1.8
fCLK = 250MHz, 2x interpolation, 0dBFS,
fOUT = 10MHz
27
32
mA
Digital Supply Current
IDVDD1.8
fCLK = 250MHz, 2x interpolation, 0dBFS,
fOUT = 10MHz
229
250
mA
Digital I/O Supply Current
IDVDD3.3
fCLK = 250MHz, 2x interpolation, 0dBFS,
fOUT = 10MHz
912
mA
Clock Supply Current
IAVCLK
fCLK = 250MHz, 2x interpolation, 0dBFS,
fOUT = 10MHz
2.3
4
mA
Total Power Dissipation
PTOTAL
fCLK = 250MHz, 2x interpolation, 0dBFS,
fOUT = 10MHz
831
mW
AVDD3.3
530
AVDD1.8
1
DVDD1.8
26
DVDD3.3
350
Power-Down Current
All I/O are static high or
low, bit 2 to bit 4 of
address 00h are set high
AVCLK
2
A
AVDD3.3 Power-Supply Rejection
Ratio
PSRRA
(Note 10)
0.125
%FS/V
ELECTRICAL CHARACTERISTICS (continued)
(DVDD1.8 = AVDD1.8 = 1.8V, AVCLK = AVDD3.3 = DVDD3.3 = 3.3V, modulator off, 2x interpolation, DATACLK output mode, output is
50
double-terminated, external reference at 1.25V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C,
unless otherwise noted.) (Note 2)
Note 2: All specifications are 100% tested at TA ≥ +25°C. Specifications at TA < +25°C are guaranteed by design and characterization.
Note 3: Specification is 100% production tested at TA ≥ +25°C.
Note 4: 3.84MHz bandwidth, single carrier.
Note 5: Excludes data latency.
Note 6: Measured single-ended into a 50
load.
Note 7: Excludes sin(x)/x rolloff.
Note 8: Differential voltage swing defined as IVPI + IVNI.
Note 9: Guaranteed by design and characterization.
Note 10:Parameter defined as the change in midscale output caused by a ±5% variation in the nominal supply voltage.
V(CLKN)
V(CLKP)
VP
VN
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