參數(shù)資料
型號(hào)： MAX5898EGK+D
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 2/33頁(yè)
文件大?。?/td> 0K
描述： IC DAC 16BIT DUAL 500MSPS 68-QFN
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 30
設(shè)置時(shí)間： 11ns
位數(shù)： 16
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 831mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 68-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 68-QFN 裸露焊盤（10x10）
包裝： 管件
輸出數(shù)目和類型： 2 電流，單極
采樣率（每秒）： 500M
MAX5898
16-Bit, 500Msps, Interpolating and Modulating
Dual DAC with Interleaved LVDS Inputs
10
______________________________________________________________________________________
Pin Description
PIN
NAME
FUNCTION
1
CLKP
Noninverting Differential Clock Input. Internally biased to AVCLK / 2.
2
CLKN
Inverting Differential Clock Input. Internally biased to AVCLK / 2.
3
N.C.
Internally Connected. Do not connect.
4
DATACLKP
LVDS Data Clock Input/Output. External 100
termination to DATACLKN required.
5
DATACLKN
Complementary LVDS Data Clock Input/Output. External 100
termination to DATACLKP required.
6, 21, 30, 37
DVDD1.8
Digital Power Supply. Accepts a 1.71V to 1.89V supply range. Bypass each pin to ground with a
0.1F capacitor as close to the pin as possible.
7
SELIQN
Complementary LVDS Channel Select Input. Set SELIQN low and SELIQP high to direct data to
the channel. Set SELIQP low and SELIQN high to direct data to the channel. Internal 110
termination to SELIQP.
8
SELIQP
LVDS Channel Select Input. Set SELIQN low and SELIQP high to direct data to the channel. Set
SELIQP low and SELIQN high to direct data to the channel. Internal 110
termination to SELIQN.
9
D15N
Complementary LVDS Data Bit 15 (MSB). Internal 110
termination to D15P.
10
D15P
LVDS Data Bit 15 (MSB). Internal 110
termination to D15N.
11
D14N
Complementary LVDS Data Bit 14. Internal 110
termination to D14P.
12
D14P
LVDS Data Bit 14. Internal 110
termination to D14N.
13
D13N
Complementary LVDS Data Bit 13. Internal 110
termination to D13P.
14
D13P
LVDS Data Bit 13. Internal 110
termination to D13N.
15
D12N
Complementary LVDS Data Bit 12. Internal 110
termination to D12P.
16
D12P
LVDS Data Bit 12. Internal 110
termination to D12N.
17
D11N
Complementary LVDS Data Bit 11. Internal 110
termination to D11P.
18
D11P
LVDS Data Bit 11. Internal 110
termination to D11N.
19
D10N
Complementary LVDS Data Bit 10. Internal 110
termination to D10P.
20
D10P
LVDS Data Bit 10. Internal 110
termination to D10N.
22
D9N
Complementary LVDS Data Bit 9. Internal 110
termination to D9P.
23
D9P
LVDS Data Bit 9. Internal 110
termination to D9N.
24
D8N
Complementary LVDS Data Bit 8. Internal 110
termination to D8P.
25
D8P
LVDS Data Bit 8. Internal 110
termination to D8N.
26
D7N
Complementary LVDS Data Bit 7. Internal 110
termination to D7P.
27
D7P
LVDS Data Bit 7. Internal 110
termination to D7N.
28
D6N
Complementary LVDS Data Bit 6. Internal 110
termination to D6P.
29
D6P
LVDS Data Bit 6. Internal 110
termination to D6N.
31
D5N
Complementary LVDS Data Bit 5. Internal 110
termination to D5P.
32
D5P
LVDS Data Bit 5. Internal 110
termination to D5N.
33
D4N
Complementary LVDS Data Bit 4. Internal 110
termination to D4P.
34
D4P
LVDS Data Bit 4. Internal 110
termination to D4N.
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