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參數(shù)資料
| 型號： | MAX5898EGK+D |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 21/33頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 16BIT DUAL 500MSPS 68-QFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 30 |
| 設(shè)置時間： | 11ns |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 831mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 68-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 68-QFN 裸露焊盤（10x10） |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 2 電流，單極 |
| 采樣率（每秒）： | 500M |
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MAX5898
16-Bit, 500Msps, Interpolating and Modulating
Dual DAC with Interleaved LVDS Inputs
28
______________________________________________________________________________________
ground sections with only one point connecting the
three planes at the exposed paddle under the
MAX5898. Run digital signals above the digital ground
plane and analog/clock signals above the analog/clock
ground plane. Keep digital signals as far away from
sensitive analog inputs, reference lines, and clock
inputs as practical. Use a symmetric design of clock
input and the analog output lines to minimize 2nd-order
harmonic distortion components, thus optimizing the
dynamic performance of the DAC. Keep digital signal
paths short and run lengths matched to avoid propaga-
tion delay and data skew mismatches.
The MAX5898 requires five separate power-supply
inputs for the analog (AVDD1.8 and AVDD3.3), digital
(DVDD1.8 and DVDD3.3), and clock (AVCLK) circuitry.
Decouple each voltage supply pin with a separate
0.1F capacitor as close to the device as possible and
with the shortest possible connection to the appropriate
ground plane. Minimize the analog and digital load
capacitances for optimized operation. Decouple all
power-supply voltages at the point they enter the PCB
with tantalum or electrolytic capacitors. Ferrite beads
with additional decoupling capacitors forming a pi-net-
work could also improve performance.
The exposed paddle MUST be soldered to the ground.
Use multiple vias, an array of at least 4 x 4 vias, directly
under the EP to provide a low thermal and electrical
impedance path for the IC.
Figure 18. Typical External Reference Circuit
1.2V
REFERENCE
CURRENT-
SOURCE
ARRAY DAC
REFIO
EXTERNAL
1.25V
REFERENCE
RSET
FSADJ
IREF
10k
DACREF
1
F
MAX5898
1.2V
REFERENCE
CURRENT-
SOURCE
ARRAY DAC
REFIO
FSADJ
IREF
10k
DACREF
1
F
MAX5898
RSET
Figure 19. Internal Reference Architecture
Table 5. IOUTFS and RSET Selection Matrix Based on a Typical 1.20V Reference Voltage
RSET (k
)
FULL-SCALE
CURRENT
IOUTFS (mA)
REFERENCE
CURRENT
IREF (A)
CALCULATED
1% EIA STD
OUTPUT VOLTAGE
VIOUTP/N* (mVP-P)
2
62.50
19.2
19.1
100
5
156.26
7.68
7.5
250
10
312.50
3.84
3.83
500
15
468.75
2.56
2.55
750
20
625.00
1.92
1.91
1000
*
Terminated into a 50
load.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX5898EGK-TD | 功能描述:數(shù)模轉(zhuǎn)換器- DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5898EVCMOD2 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC Evaluation System/Evaluation Kit for the MAX5898 RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5898EVKIT | 功能描述:數(shù)模轉(zhuǎn)換器- DAC Evaluation System/Evaluation Kit for the MAX5898 RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| MAX5900AAETT | 制造商:Maxim Integrated Products 功能描述:SIMPLE SWAPPER HOT-SWAP CONTROLLER - Rail/Tube |
| MAX5900AAETT+ | 制造商:Maxim Integrated Products 功能描述:SIMPLE SWAPPER HOT-SWAP CONTROLLER - Rail/Tube |
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