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參數(shù)資料
| 型號： | MAX2986CXV |
| 廠商： | Maxim Integrated Products, Inc. |
| 英文描述： | Single Channel M-LVDS Type-1 Receiver 8-SON |
| 中文描述： | 集成電力線數(shù)字收發(fā)器 |
| 文件頁數(shù)： | 11/28頁 |
| 文件大?。?/td> | 349K |
| 代理商： | MAX2986CXV |
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M
Integrated Powerline Digital Transceiver
______________________________________________________________________________________
11
MIIRXDV
MIIDAT
MIICRS
MIICLK
DATA
DATA
DATA
DATA
DATA
IFG
MIIDAT
MIIRXDV
MIICRS
MIICLK
t
OH
t
OV
Figure 8. MII Interface—Detailed Receive Timing
Table 4. MII Interface—Detailed Receive
Timing*
PARAMETER
DESCRIPTION
MAX
UNITS
t
OV
Data valid after positive
edge of MIICLK
2.5
ns
t
OH
Nominal data hold time
One
MIICLK
period
ns
Figure 7. Receive Behavior of the MII Interface
MII Signal Timing—Receiving
When a frame is ready to send from the MAX2986 to
the external host, the MAX2986 asserts MIIRXDV after
IFG (which is about 0.96μs), while there is no transmis-
sion session in progress (with respect to MIICRS).
Note:
The receive process cannot start while a trans-
mission is in progress.
While the MAX2986 keeps MIIRXDV high, data is sam-
pled synchronously with respect to MIICLK from the
MAX2986 through MIIDAT. After the last byte of data is
received, the MAX2986 resets MIIRXDV.
Receive timing of the MII interface is illustrated in
Figure 7, with details in Figure 8 and Table 4.
*
Per IEEE 802.3u standard.
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