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| 型號： | MAX11043ATL+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 4/33頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT W/DAC 40-TQFN-EP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | ADC，DAC |
| 分辨率（位）： | 16 b |
| 采樣率（每秒）： | 9.6M |
| 數(shù)據(jù)接口： | 串行 |
| 電壓電源： | 模擬和數(shù)字 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 40-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 40-TQFN-EP（6x6） |
| 包裝： | 帶卷 (TR) |
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MAX11043
4-Channel, 16-Bit, Simultaneous-Sampling ADCs
with PGA, Filter, and 8-/12-Bit Dual-Stage DAC
12
Maxim Integrated
Detailed Description
The MAX11043 features 4 single-ended or differential
channels of simultaneous-sampling ADCs with 16-bit
resolution. The MAX11043 contains a versatile filter
block and PGA per channel. The filter consists of seven
cascaded 2nd-order filter sections for each channel
allowing the construction of a 14th-order filter. The filter
coefficients are user-programmable. Configure each
2nd-order filter as a LP filter, HP filter, or BP filter with
optional rectification. Gain and phase mismatch of the
analog signal path is better than -50dB.
The ADCs can digitize signals up to 200kHz. A 40MHz
serial interface provides communication to and from the
device. The SPI interface provides throughput of
1600ksps; 4 channels at 400ksps per channel or 2
channels at 800ksps per channel. A software-selec-
table scan mode allows reading the ADC results while
simultaneously updating the DAC. Other features of the
MAX11043 include an internal (+2.5V) or external
(+2.0V to +2.8V) reference, power-saving modes, and
a PGA with gains of 1 to 64. The PGA includes an EQ
function that automatically boosts low-amplitude, high-
frequency signals for applications such as CW-chirp
radar.
The MAX11043 includes two 8-bit coarse DACs that set
the high and low references for a second-stage 12-bit
fine DAC, typically used for VCO control. Use software
controls to set the DAC, or step the DAC up and down
using hardware control in programmable steps.
MAX11043 Signal Path
Each of the 4 ADC channels features a PGA and filter
block that feeds the signal to the sigma-delta modula-
tor. The PGA can either be bypassed, which provides a
gain of 1, set to a gain of 8, a gain of 16, or set to ana-
log EQ mode. For more amplification, set the ADC mod-
ulator gain to one, two, or four. After the modulator, the
result passes through the sinc 5 filter and decimator.
Seven biquad programmable digital filters isolate the
band of interest. Read the result using the 40MHz SPI
interface. See Figure 1.
Analog-to-Digital Converter
The MAX11043 features a quad sigma-delta ADC archi-
tecture with 4 differential input channels. For single-
ended operation, connect the N input to the
common-mode voltage or bypass to AGND with a 10F
capacitor. All inputs feature a programmable bias gen-
erator; see the
CONFIG_ Register (0Ch–0Fh) section.
All four ADCs convert simultaneously with a maximum
modulator sampling rate of 9.6Msps; decimated by 12
or 24 for output rates of 800ksps and 400ksps, respec-
tively. The SPI bus limits the maximum output data rate
to 40Mbps.
Sinc 5 Filter
The sinc 5 filter removes high-frequency noise from the
output of the sigma-delta modulator and sets the upper
frequency response of the ADC. It also decimates the
modulator data by a factor of 12, providing a maximum
of 800ksps to the programmable filters when the modu-
lator is operating at 9.6Msps. Figure 2 shows the fre-
quency characteristics of the sinc 5 filter with the
PGA AND
FILTER
MODULATOR
WITH GAINS OF
1, 2, OR 4
SINC 5 FILTER AND
DECIMATE BY 12
SPI
BIQUAD
FILTER 1
BIQUAD
FILTER 7
IN
7 BIQUAD FILTERS IN SERIES
MODG1
MODG0
0
1
0
1
GAIN
1
2
4
EQUALIZER
LP FILTER AND GAIN 16X
LP FILTER AND GAIN 8X
BYPASS
PGA AND FILTER MODES
PDPGA
PGAG
EQ
1
X
0
1
0
X
1
FINE
GAIN
ADJUST
CHAN X FINE GAIN
RESOLUTION = 16 BITS
RAM
POR VALUES
USER VALUES
USER DEFINED
EQUALIZER
LP FILTER
BIQUAD MODES
FILT
1
0
X
RANGE: -4 TO +4
DECIMATE
BY 1 OR 2
DECIMATE
TOTAL
DECIMATION
2
24
1
12
DECSEL
0
1
Figure 1. Signal Path
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參數(shù)描述 |
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| MAX11044 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:4-/6-/8-Channel, 16-Bit, Simultaneous-Sampling ADCs |
| MAX11044_10 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:4-/6-/8-Channel, 16-Bit, Simultaneous-Sampling ADCs |
| MAX11044_11 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs |
| MAX11044_12 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs |
| MAX11044BECB+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC MAX11044BECB+ RoHS:否 制造商:Maxim Integrated 通道數(shù)量: 結(jié)構(gòu): 轉(zhuǎn)換速率: 分辨率: 輸入類型: 信噪比: 接口類型: 工作電源電壓: 最大工作溫度: 安裝風(fēng)格: 封裝 / 箱體: |
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