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參數(shù)資料
型號(hào)： MAX11043ATL+T
廠商： Maxim Integrated Products
文件頁數(shù)： 31/33頁
文件大?。?/td> 0K
描述： IC ADC 16BIT W/DAC 40-TQFN-EP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
類型： ADC，DAC
分辨率（位）： 16 b
采樣率（每秒）： 9.6M
數(shù)據(jù)接口： 串行
電壓電源： 模擬和數(shù)字
電源電壓： 3 V ~ 3.6 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 40-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 40-TQFN-EP（6x6）
包裝： 帶卷 (TR)
MAX11043
4-Channel, 16-Bit, Simultaneous-Sampling ADCs
with PGA, Filter, and 8-/12-Bit Dual-Stage DAC
7
Maxim Integrated
Note 1: Devices 100% production tested at TA = +125°C. Guaranteed by design and characterization to TA = -40°C.
Note 2: Full scale in analog EQ mode decreases with increasing frequency at a rate of 20dB/decade from 8kHz. If digital EQ is also
used, full scale decreases with increasing frequency at 40dB/decade from 5kHz.
Note 3: SFDR in the EQ mode is normalized to the input by subtracting the analog EQ gain at each frequency (20dB/decade) from
the FFT results.
Note 4: The absolute input voltage range is 0 to AVDD. For optimal performance, use a common-mode voltage of AVDD/2.
Note 5: Switched capacitor input impedance is proportional to 1/fC. Where f is the sampling frequency and C is the input capacitance.
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = +3.0V to +3.6V, VDVDD = +3.0V, CDVREG = 10F, VAGND = VDGND = 0V, common-mode input voltage = VAVDD/2, VREFBP
= VREFA = VREFB = VREFC = VREFD = +2.5V (external reference), VREFDAC = VREFDACH = +1.25V (external reference), VREFDACL =
0V, CREFBP = CREFA = CREFB = CREFC = CREFD = CREFDAC = 1F, fSCLK = 38.4MHz, fEXCLK = 38.4MHz (external clock applied to
OSCIN), clock divider set to 4, SHDN = DACSTEP = UP/DWN = DGND, CONVRUN = DVDD, all analog inputs driven directly through
a series 150
/330pF anti-alias filter, PGA gain = 1. Default filters and gain settings. DIFF = 1. TA = TMIN to TMAX, unless otherwise noted
(Note 1). Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SPI INTERFACE
SCLK Clock Period
tCP
25
ns
SCLK Pulse-Width High
tCH
10
ns
SCLK Pulse-Width Low
tCL
10
ns
SCLK Rise to DOUT Transition
tDOT
CLOAD = 20pF
1
15
ns
CS Fall to SCLK Rise Setup Time
tCSS
10
ns
SCLK Rise to
CS Rise Setup Time
tCSH
5ns
DIN to SCLK Rise Setup Time
tDS
10
ns
DIN to SCLK Rise Hold Time
tDH
0ns
CS Pulse-Width High
tCSPWH
10
ns
CS Rise to DOUT Disable
tDOD
CLOAD = 20pF
20
ns
CS Fall to DOUT Enable
tDOE
CLOAD = 20pF
1
ns
EOC Fall to CS Fall
tRDS
10
ns
Typical Operating Characteristics
(VAVDD = +3.3V, VDVDD = +3.0V, fSCLK = fEXCLK = 19.2MHz, VREFBP, VREF_ = +2.5V, common-mode input voltage = VAVDD/2,
TA = +25°C, unless otherwise noted.)
INL vs. CODE
MAX11043
toc01
CODE (LSB)
INL
(LSB)
49152
32768
16384
-4
-3
-2
-1
0
1
2
3
4
5
-5
0
65536
LP MODE
GAIN = 1
400ksps FFT
LP MODE
MAX11043
toc02
FREQUENCY (kHz)
AMPLITUDE
(dBFS)
180
160
140
120
100
80
60
40
20
-100
-80
-60
-40
-20
0
-120
0
200
fIN = 50kHz
GAIN = 1
800ksps FFT
LP MODE
MAX11043
toc03
FREQUENCY (kHz)
AMPLITUDE
(dBFS)
350
300
250
200
150
100
50
-120
-100
-80
-60
-40
-20
0
-140
0400
fIN = 50kHz
GAIN = 1
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MAX11044BECB+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC MAX11044BECB+ RoHS:否 制造商:Maxim Integrated 通道數(shù)量: 結(jié)構(gòu): 轉(zhuǎn)換速率: 分辨率: 輸入類型: 信噪比: 接口類型: 工作電源電壓: 最大工作溫度: 安裝風(fēng)格: 封裝 / 箱體:
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