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參數(shù)資料
| 型號(hào)： | M36DR232 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 2 Mbit 128K x16 SRAM, Multiple Memory Product |
| 中文描述： | 32兆位的2Mb x16插槽，雙行，頁閃存和2兆位128K的x16的SRAM，多個(gè)存儲(chǔ)產(chǎn)品 |
| 文件頁數(shù)： | 37/46頁 |
| 文件大?。?/td> | 329K |
| 代理商： | M36DR232 |
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M36D232A, M36DR232B
Table 32. SRAM Write AC Characteristics
(T
A
= –40 to 85°C; V
DDS
= 1.65V to 2.2V)
Note: 1. t
AS
is measured from the address valid to the beginning of write.
2. t
WR
is measured from the end or write to the address change. t
WR
applied in case a write ends as E1S or WS going high.
3. t
CW
is measured from E1S going low end of write.
4. A Write occurs during the overlap (t
WP
) of low E1S and low WS. A write begins when E1S goes low and WS goes low with asserting
UBS or LBS for single byte operation or simultaneously asserting UBS and LBS for double byte operation. A write ends at the ear-
liest transition when E1S goes high and WS goes high. The t
WP
is measured from the beginning of write to the end of write.
Symbol
Alt
Parameter
SRAM
Unit
Max
t
AVAV
t
WC
Write Cycle Time
70
ns
t
AVE1L
t
AS(1)
Address Valid to Chip Enable 1 Low
0
ns
t
AVE2H
t
AS(1)
Address Valid to Chip Enable 2 High
0
ns
t
AVWH
t
AW
Address Valid to Write Enable High
60
ns
t
AVWL
t
AS(1)
Address Valid to Write Enable Low
0
ns
t
BLWH
t
BW
UBS, LBS Valid to End of Write
60
ns
t
DVE1H
t
DW
Input Valid to Chip Enable 1 High
40
ns
t
DVE2L
t
DW
Input Valid to Chip Enable 2 Low
40
ns
t
DVWH
t
DW
Input Valid to Write Enable High
40
ns
t
E1HAX
t
WR(2)
Chip Enable 1 High to Address Transition
0
ns
t
E1LWH
,
t
E2HWH
t
CW(3)
Chip Select to End of Write
60
ns
t
E2LAX
t
WR(2)
Chip Enable 2 Low to Address Transition
0
ns
t
GHQZ
t
GHZ
Output Enable Higt to Output Hi-Z
0
25
ns
t
WHAX
t
WR(2)
Write Enable High to Address Transition
0
ns
t
WHDX
t
DH
Write Enable High to Input Transition
0
ns
t
WHQX
t
OW
Write Enable High to Output Transition
5
ns
t
WLQZ
t
WHZ
Write Enable Low to Output Hi-Z
0
25
ns
t
WLWH
t
WP(4)
Write Enable Pulse Width
50
ns
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| M36DR232A | 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 2 Mbit 128K x16 SRAM, Multiple Memory Product |
| M36DR232B | 32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 2 Mbit 128K x16 SRAM, Multiple Memory Product |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M36DR232A | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 2 Mbit 128K x16 SRAM, Multiple Memory Product |
| M36DR232A120ZA6T | 功能描述:閃存 32M (2Mx16) 120ns RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| M36DR232AZA | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 2 Mbit 128K x16 SRAM, Multiple Memory Product |
| M36DR232B | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 2 Mbit 128K x16 SRAM, Multiple Memory Product |
| M36DR232BZA | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 2 Mbit 128K x16 SRAM, Multiple Memory Product |
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