參數(shù)資料
型號： M306H3MC-XXXFP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP116
封裝： 20 X 20 MM, 0.65 MM PITCH, PLASTIC, LQFP-116
文件頁數(shù)： 66/135頁
文件大?。?/td> 2583K
代理商： M306H3MC-XXXFP
Rev.1.00
2004.03.23
page 36 of 320
M306H3MC-XXXFP/FCFP
Bus mode
PM1 register
PM17 bit
CSE register
CSE31W to CSE30W bit
CSE21W to CSE20W bit
CSE11W to CSE10W bit
CSE01W to CSE00W bit
Bus cycle
CSR register
CS3W bit (Note 1)
CS2W bit (Note 1)
CS1W bit (Note 1)
CS0W bit (Note 1)
Area
Software wait
Note 1: To use the RDY signal, set this bit to “0” (with wait state).
Note 2: To access in multiplexed bus mode, set the corresponding bit of CS0W to CS3W to “0” (with wait state).
Note 3: After reset, the PM17 bit is set to “0” (without wait state), all of the CS0W to CS3W bits are set to “0” (with wait state), and the CSE register is set to
“0016” (one wait state for CS0 to CS3). Therefore, the internal RAM and internal ROM are accessed with no wait states, and all external areas are
accessed with one wait state.
Separate bus
Multiplexed
bus (Note 2)
1
0
1
0
1
0
002
012
102
002
012
102
2 BCLK cycles
1 BCLK cycle (read)
2 BCLK cycles (write)
2 BCLK cycles (Note 3)
3 BCLK cycles
4 BCLK cycles
2 BCLK cycles
3 BCLK cycles
4 BCLK cycles
3 BCLK cycles
Internal
RAM, ROM
External
area
1 wait
No wait
1 wait
2 waits
3 waits
1 wait
2 waits
3 waits
1 wait
002
2 BCLK cycle
SFR
0
1 BCLK cycle (Note 3)
No wait
Table 2.4.10. Bit and Bus Cycle Related to Software Wait
相關PDF資料
PDF描述
M306H3FCFP 16-BIT, FLASH, 10 MHz, MICROCONTROLLER, PQFP116
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參數(shù)描述
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