參數(shù)資料
型號： M306H3MC-XXXFP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP116
封裝： 20 X 20 MM, 0.65 MM PITCH, PLASTIC, LQFP-116
文件頁數(shù)： 119/135頁
文件大?。?/td> 2583K
代理商： M306H3MC-XXXFP
Rev.1.00
2004.03.23
page 84 of 320
M306H3MC-XXXFP/FCFP
Single-chip mode
Memory expansion mode
Transfer unit
Bus width
Access address
Microprocessor mode
No. of read
No. of write
No. of read No. of write
cycles
16-bit
Even
1
8-bit transfers
(BYTE= “L”)
Odd
1
(DMBIT= “1”)
8-bit
Even
—
1
(BYTE = “H”)
Odd
—
1
16-bit
Even
1
16-bit transfers
(BYTE = “L”)
Odd
2
(DMBIT= “0”)
8-bit
Even
—
2
(BYTE = “H”)
Odd
—
2
Table 2.9.2. DMA Transfer Cycles
2.9.2 DMA Transfer Cycles
Any combination of even or odd transfer read and write addresses is possible. Table 2.9.2 shows the
number of DMA transfer cycles. Table 2.9.3 shows the Coefficient j, k.
The number of DMAC transfer cycles can be calculated as follows:
No. of transfer cycles per transfer unit = No. of read cycles x j + No. of write cycles x k
Table 2.9.3. Coefficient j, k
Internal area
Internal ROM, RAM
SFR
Separate bus
External area
Multiplex bus
No wait
With wait
No wait
With wait1
1
2
1
2
1 wait
2
2 waits
3
3 waits
4
1wait
3
2 waits
3
3 waits
4
With wait1
j
k
2
3
433
4
Notes:
1. Depends on the set value of CSE register.
2
相關(guān)PDF資料
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參數(shù)描述
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