參數(shù)資料
型號(hào)： M306H3MC-XXXFP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP116
封裝： 20 X 20 MM, 0.65 MM PITCH, PLASTIC, LQFP-116
文件頁(yè)數(shù)： 53/135頁(yè)
文件大?。?/td> 2583K
代理商： M306H3MC-XXXFP
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Rev.1.00
2004.03.23
page 24 of 320
M306H3MC-XXXFP/FCFP
Figure 2.4.1. PM0 Register
Processor mode register 0 (Note 1)
Symbol
Address
After reset (Note 4)
PM0
000416
000000002 (
CNVSS pin = “L”)
000000112 (
CNVSS pin = “H”) (Note 5)
Bit name
Function
Bit symbol
RW
b7
b6
b5
b4
b3
b2
b1
b0
0 0: Single-chip mode
0 1: Memory expansion mode
1 0: Must not be set
1 1: Microprocessor mode
b1 b0
PM03
PM01
PM00
Processor mode bit
(Note 4)
PM02
R/W mode select bit
0 : RD,BHE,WR
1 : RD,WRH,WRL
Software reset bit
Setting this bit to “1” resets the
microcomputer. When read, its content
is “0”.
PM04
0 0 : Multiplexed bus is unused
(Separate bus in the entire CS
space)
0 1 : Allocated to CS2 space
1 0 : Allocated to CS1 space
1 1 : Allocated to the entire CS space
(Note 3)
b5 b4
Multiplexed bus space
select bit
PM05
RW
PM06
PM07
Port P40 to P43 function
select bit (Note 2)
0 : Address output
1 : Port function
(Address is not output)
BCLK output disable bit
0 : BCLK is output
1 : BCLK is not output
(high impedance)
Note 1: Write to this register after setting the PRC1 bit in the PRCR register to "1" (write enable).
Note 2: Effective when the PM01 to PM00 bits are set to “012” (memory expansion mode) or “112” (microprocessor
mode).
Note 4: The PM01 to PM00 bits do not change at software reset, watchdog timer reset and oscillation stop
Note 5: In the flash memory version, the value is at the CNVSS pin = VCC and the M1 pin = VCC. In the mask ROM version,
the CNVSS pin = VCC.
detection reset.
RW
(Note 2)
Note 3: To set the PM01 to PM00 bits are “012” and the PM05 to PM04 bits are “112” (multiplexed bus assigned to
the entire CS space), apply an “H” signal to the BYTE pin (external data bus is 8 bits wide). While the
CNVSS pin and the M1 pin are held “H” (= VCC) in the flash memory version (the CNVSS pin is held “H” in the
mask ROM version), do not rewrite the PM05 to PM04 bits to “112” after reset.
If the PM05 to PM04 bits are set to “112” during memory expansion mode, P31 to P37 and P40 to P43
become I/O ports, in which case the accessible area for each CS is 256 bytes.
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