參數資料
型號: LPC2919
廠商: NXP Semiconductors N.V.
元件分類: 32位微控制器
英文描述: ARM9 microcontroller with CAN and LIN
中文描述: 具有CAN和LIN的ARM9微控制器
文件頁數: 14/68頁
文件大?。?/td> 384K
代理商: LPC2919
Timer 0 in the MSCSS
Timer 1 in the MSCSS
PWM 0
PWM 0
PWM 0
PWM 0
VPB side of ADC 1
LPC2917_19_1
NXP B.V. 2007. All rights reserved.
Preliminary data sheet
Rev. 1.01 — 15 November 2007
14 of 68
NXP Semiconductors
LPC2917/19
ARM9 microcontroller with CAN and LIN
[1]
This clock is always on (cannot be switched off for system safety reasons)
[2]
In the peripheral subsystem parts of the Timers, Watchdog Timer, SPI and UART have their own clock
source. See
Section 8.4
for details.
[3]
In the Power Clock and Reset Control subsystem parts of the CGU, RGU PMU have their own clock
source. See
Section 8.8
for details.
[4]
The clock should remain activated when system wake-up on timer or UART is required.
8.
Block description
8.1 Flash memory controller
8.1.1
Overview
The Flash Memory Controller (FMC) interfaces to the embedded flash memory for two
tasks:
Providing memory data transfer
Memory configuration via triggering, programming and erasing
BASE_MSCSS_CLK
CLK_MSCSS_VPB
CLK_MSCSS_MTMR0
CLK_MSCSS_MTMR1
CLK_MSCSS_PWM0
CLK_MSCSS_PWM1
CLK_MSCSS_PWM2
CLK_MSCSS_PWM3
CLK_MSCSS_ADC1_V
PB
CLK_MSCSS_ADC2_V
PB
CLK_UART0
CLK_UART1
CLK_SPI0
CLK_SPI1
CLK_SPI2
CLK_TMR0
CLK_TMR1
CLK_TMR2
CLK_TMR3
CLK_ADC1
VPB side of the MSCSS
VPB side of ADC 2
BASE_UART_CLK
UART 0 interface clock
UART 1 interface clock
SPI 0 interface clock
SPI 1 interface clock
SPI 2 interface clock
Timer 0 clock for counter part
Timer 1 clock for counter part
Timer 2 clock for counter part
Timer 3 clock for counter part
Control of ADC 1, capture sample
result
Control of ADC 2, capture sample
result
BASE_SPI_CLK
BASE_TMR_CLK
BASE_ADC_CLK
CLK_ADC2
BASE_CLK_TESTSHELL
CLK_TESTSHELL_IP
Table 7.
Base clock
Base clock and branch clock overview
…continued
Branch clock name
Parts of the device clocked by
this branch clock
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