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參數(shù)資料
| 型號： | LM25066PSQX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, QCC24 |
| 封裝： | LLP-24 |
| 文件頁數(shù)： | 9/48頁 |
| 文件大小： | 1456K |
| 代理商： | LM25066PSQX |
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above its threshold, the current source is enabled, sourcing
current out of the pin, raising the voltage at FB to provide
threshold hysteresis. The PGD output is forced low when ei-
ther the UVLO/EN pin is below its threshold or the OVLO pin
is above its threshold. The status of the PGD pin can be read
via the PMBus interface in either the STATUS_WORD (79h)
or DIAGNOSTIC_WORD (E1h) registers.
VDD Sub-Regulator
The LM25066 contains an internal linear sub-regulator which
steps down the input voltage to generate a 4.5V rail used for
powering low voltage circuitry. When the input voltage is be-
low 4.5V, VDD will track VIN. For input voltages 3.3V and
below, VDD should be tied directly to VIN to avoid the dropout
of the sub-regulator. The VDD sub-regulator should be used
as the pull-up supply for the CL, CB, RETRY, ADR2, ADR1,
ADR0 pins if they are to be tied high. It may also be used as
the pull-up supply for the PGD and the SMBus signals (SDA,
SCL, SMBA). The VDD sub-regulator is not designed to drive
high currents and should not be loaded with other integrated
circuits. The VDD pin is current limited to 45mA in order to
protect the LM25066 in the event of a short. The sub-regulator
requires a bypass capacitance having a value between 1 F
and 4.7 F to be placed as close to the VDD pin as the PCB
layout allows.
Remote Temperature Sensing
The LM25066 is designed to measure temperature remotely
using an MMBT3904 NPN transistor. The base and collector
of the MMBT3904 is connected to the DIODE pin and the
emitter is grounded. Place the MMBT3904 near the device
whose temperature is to be monitored. If the temperature of
the hot-swap pass MOSFET, Q
1, is to be measured, the
MMBT3904 should be placed as close to Q
1 as the layout
allows. The temperature is measured by means of a change
in the diode voltage in response to a step in current supplied
by the DIODE pin. The DIODE pin sources a constant 9.4 A
but pulses 250 A once every millisecond in order to measure
the diode temperature. Care must be taken in the PCB layout
to keep the parasitic resistance between the DIODE pin and
the MMBT3904 low so as not to degrade the measurement.
Additionally, a small 1000 pF bypass capacitor should be
placed in parallel with the MMBT3904 to reduce the effects of
noise. The temperature can be read using the READ_TEM-
PERATURE_1 PMBus command (8Dh). The default limits of
the LM25066 will cause SMBA pin to be pulled low if the mea-
sured temperature exceeds 125°C and will disable the hot-
swap pass MOSFET if the temperature exceeds 150°C.
These thresholds can be reprogrammed via the PMBus in-
terface
using
the
OT_WARN_LIMIT
(51h)
and
OT_FAULT_LIMIT (4Fh) commands. If the temperature mea-
surement and protection capability of the LM25066 is not
used, the DIODE pin should be grounded.
Damaged MOSFET Detection
The LM25066 is able to detect whether the external MOSFET,
Q
1, is damaged under certain conditions. If the voltage across
the sense resistor exceeds 4mV while the GATE voltage is
low or the internal logic indicates that the GATE should be
low,
the
EXT_MOSFET_SHORTED
bit
in
the
STATUS_MFR_SPECIFIC (80h) and DIAGNOSTIC_WORD
(E1h) registers will be toggled high and the SMBA pin will be
pulled low unless this feature is disabled using the
ALERT_MASK register (D8h). This method effectively deter-
mines whether Q
1 is shorted because of damage present
between the drain and gate and/or drain and source of the
external MOSFET.
Enabling/Disabling and Resetting
The output can be disabled at any time during normal opera-
tion by either pulling the UVLO/EN pin to below its threshold
or the OVLO pin above its threshold, causing the GATE volt-
age to be forced low with a pull-down strength of 2mA. Tog-
gling the UVLO/EN pin will also reset the LM25066 from a
latched-off state due to an over-current or over-power limit
condition which has caused the maximum allowed number of
retries to be exceeded. While the UVLO/EN or OVLO pins can
be used to disable the output, they have no effect on the
volatile memory or address location of the LM25066. User
stored values for address, device operation, and warning and
fault levels programmed via the SMBus are preserved while
the LM25066 is powered regardless of the state of the UVLO/
EN and OVLO pins. The output may also be enabled or dis-
abled by writing 80h or 0h to the OPERATION (03h) register.
To re-enable after a fault, the fault condition should be cleared
and the OPERATION (03h) register should be written to 0h
and then 80h.
The SMBus address of the LM25066 is captured based on
the states of the ADR0, ADR1, and ADR2 pins (GND, NC,
VDD) during turn-on and is latched into a volatile register once
VDD has exceeded its POR threshold of 2.6V. Reassigning
or postponing the address capture is accomplished by holding
the VREF pin to ground. Pulling the VREF pin low will also
reset the logic and erase the volatile memory of the LM25066.
Once released, the VREF pin will charge up to its final value
and the address will be latched into a volatile register once
the voltage at the VREF exceeds 2.4V.
17
www.national.com
LM25066
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相關代理商/技術參數(shù) |
參數(shù)描述 |
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| LM25066PSQX/NOPB | 功能描述:熱插拔功率分布 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
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