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參數(shù)資料
| 型號(hào)： | LM25066PSQX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, QCC24 |
| 封裝： | LLP-24 |
| 文件頁數(shù)： | 40/48頁 |
| 文件大小： | 1456K |
| 代理商： | LM25066PSQX |
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SMBA Response
The SMBA effectively has two masks:
1. The Alert Mask Register at D8h, and
2. The ARA Automatic Mask.
The ARA Automatic Mask is a mask that is set in response to
a successful ARA read. An ARA read operation returns the
PMBus address of the lowest addressed part on the bus
that has its SMBA asserted. A successful ARA read means
that THIS part was the one that returned its address. When a
part responds to the ARA read, it releases the SMBA signal.
When the last part on the bus that has an SMBA set has suc-
cessfully reported its address, the SMBA signal will de-assert.
The way that the LM25066 releases the SMBA signal is by
setting the ARA Automatic mask bit for all fault conditions
present at the time of the ARA read. All status registers will
still show the fault condition, but it will not generate an SM-
BA on that fault again until the ARA Automatic mask is cleared
by the host issuing a Clear Fault command to this part. This
should be done as a routine part of servicing an SMBA con-
dition on a part, even if the ARA read is not done. Figure 20
depicts a schematic version of this flow.
301158a0
FIGURE 20. Typical Flow Schematic for SMBA Fault
45
www.national.com
LM25066
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