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參數(shù)資料
| 型號： | LM25066APSQE |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, QCC24 |
| 封裝： | LLP-24 |
| 文件頁數(shù)： | 8/48頁 |
| 文件大小： | 1658K |
| 代理商： | LM25066APSQE |
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30146016
FIGURE 4. Restart Sequence
Under-Voltage Lockout (UVLO)
The series pass MOSFET (Q
1) is enabled when the input
supply voltage (V
SYS) is within the operating range defined by
the programmable under-voltage lockout (UVLO) and over-
voltage lockout (OVLO) levels. Typically the UVLO level at
V
SYS is set with a resistor divider (R1-R3) as shown in Figure
5. Refering to the Block Diagram when V
SYS is below the UV-
LO level, the internal 23 A current source at UVLO is en-
abled, the current source at OVLO is off, and Q
1 is held off by
the 2 mA pull-down current at the GATE pin. As V
SYS is in-
creased, raising the voltage at UVLO above its threshold the
23 A current source at UVLO is switched off, increasing the
voltage at UVLO, providing hysteresis for this threshold. With
the UVLO/EN pin above its threshold, Q
1 is switched on by
the 22 A current source at the GATE pin if the insertion time
delay has expired.
See the Applications Section for a procedure to calculate the
values of the threshold setting resistors (R1-R3). The mini-
mum possible UVLO level at V
SYS can be set by connecting
the UVLO/EN pin to VIN. In this case Q
1 is enabled after the
insertion time when the voltage at VIN reaches the POR
threshold. After power up, an UVLO condition will toggle high
the VIN UV FAULT bit high in the STATUS_INPUT (7Ch)
register, the INPUT bit in the STATUS_WORD (79h) register,
and
the
VIN_UNDERVOLTAGE_FAULT
bit
in
the
DIAGNOSTIC_WORD (E1h) registers, and SMBA pin will be
pulled low unless this feature is disabled using the
ALERT_MASK (D8h) register.
Over-Voltage Lockout (OVLO)
The series pass MOSFET (Q
1) is enabled when the input
supply voltage (V
SYS) is within the operating range defined by
the programmable under-voltage lockout (UVLO) and over-
voltage lockout (OVLO) levels. If V
SYS raises the OVLO pin
voltage above its threshold, Q
1 is switched off by the 2 mA
pull-down current at the GATE pin, denying power to the load.
When the OVLO pin is above its threshold, the internal 23 A
current source at OVLO is switched on, raising the voltage at
OVLO to provide threshold hysteresis. When V
SYS is reduced
below the OVLO level, Q
1 is re-enabled. An OVLO condition
will toggle high the VIN OV FAULT bit high in the STATUS_IN-
PUT (7Ch) register, the INPUT bit in the STATUS_WORD
(79h) register, and the VIN_OVERVOLTAGE_FAULT bit in
the DIAGNOSTIC_WORD (E1h) registers, and the SMBA pin
will be pulled low unless this feature is disabled using the
ALERT_MASK (D8h) register.
See the Applications Section for a procedure to calculate the
threshold setting resistor values.
Shutdown Control
The load current can be remotely switched off by taking the
UVLO/EN pin below its threshold with an open collector or
open drain device, as shown in Figure 5. Upon releasing the
UVLO/EN pin, the LM25066A switches on the load current
with inrush current and power limiting.
30146017
FIGURE 5. Shutdown Control
Power Good
The Power Good indicator (PGD) is connected to the drain of
an internal N-channel MOSFET capable of sustaining 17V in
the off-state, and transients up to 20V. An external pull-up
resistor is required at PGD to an appropriate voltage to indi-
cate the status to downstream circuitry. The off-state voltage
at the PGD pin can be higher or lower than the voltages at
VIN and OUT. PGD is switched high when the voltage at the
FB pin exceeds the PGD threshold voltage. Typically the out-
put voltage threshold is set with a resistor divider from output
to feedback, although the monitored voltage need not be the
output voltage. Any other voltage can be monitored as long
as the voltage at the FB pin does not exceed its maximum
rating. Referring to the Block Diagram, when the voltage at
the FB pin is below its threshold, the 24 A current source at
FB is disabled. As the output voltage increases, taking FB
www.national.com
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LM25066A
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| LM25066APSQE/NOPB | 功能描述:熱插拔功率分布 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
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| LM25066EVK/NOPB | 功能描述:電源管理IC開發(fā)工具 LM25066 EVAL BOARD RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| LM25066IAPSQ/NOPB | 制造商:Texas Instruments 功能描述:IC PWR MGMT/PROT PMBUS 24WQFN 制造商:Texas Instruments 功能描述:System PWR Mgmt & Protection IC |
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