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參數(shù)資料
| 型號： | LM25066APSQE |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, QCC24 |
| 封裝： | LLP-24 |
| 文件頁數(shù)： | 5/48頁 |
| 文件大小： | 1658K |
| 代理商： | LM25066APSQE |
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30146011
FIGURE 1. Typical Application Circuit
Power Up Sequence
The VIN operating range of the LM25066A is +2.9V to +17V
with transient capability to +24V. Referring to Figure 1 and
Figure 2, as the voltage at VIN initially increases, the external
N-channel MOSFET (Q
1) is held off by an internal 190 mA
pull-down current at the GATE pin. The strong pull-down cur-
rent at the GATE pin prevents an inadvertent turn-on as the
MOSFET’s gate-to-drain (Miller) capacitance is charged. Ad-
ditionally, the TIMER pin is initially held at ground. When the
VIN voltage reaches the POR threshold, the insertion time
begins. During the insertion time, the capacitor at the TIMER
pin (C
T) is charged by a 5.5 A current source and Q1 is held
off by a 2 mA pull-down current at the GATE pin regardless
of the input voltage. The insertion time delay allows ringing
and transients at VIN to settle before Q
1 is enabled. The in-
sertion time ends when the TIMER pin voltage reaches 1.7V.
C
T is then quickly discharged by an internal 1.9 mA pull-down
current. The GATE pin then switches on Q
1 when the input
voltage, V
SYS, exceeds the UVLO threshold. If VSYS is above
the UVLO threshold at the end of the insertion time, Q
1 switch-
es on at that time. The GATE pin charge pump sources 22 A
to charge the gate capacitance of Q
1. The maximum voltage
at the GATE pin with respect to ground is limited by an internal
18.8V zener diode.
As the voltage at the OUT pin increases, the LM25066A mon-
itors the drain current and power dissipation of MOSFET Q
1.
Inrush current limiting and/or power limiting circuits actively
control the current delivered to the load. During the inrush
limiting interval (t
2 in Figure 2), an internal 90 A fault timer
current source charges C
T. If Q1’s power dissipation and the
input current reduce below their respective limiting thresholds
before the TIMER pin reaches 1.7V, the 90 A current source
is switched off and C
T is discharged by the internal 2.8 A
current sink (t
3 in Figure 2). The PGD pin switches high when
the voltage at FB exceeds its rising threshold of 1.167V.
If the TIMER pin voltage reaches 1.7V before inrush current
limiting or power limiting ceases during t
2, a fault is declared
and Q
1 is turned off. See the Fault Timer & Restart section for
a complete description of the fault mode.
The LM25066A will pull the SMBA pin low after the input volt-
age has exceeded its POR threshold to indicate that the
volatile memory and device settings are in their default state.
The CONFIG_PRESET bit within the STATUS_MFR_SPE-
CIFIC register (80h) indicates default configuration of warning
thresholds and device operation and will remain set until a
CLEAR_FAULTS command is received.
13
www.national.com
LM25066A
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM25066APSQE/NOPB | 功能描述:熱插拔功率分布 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| LM25066APSQX | 制造商:TI 制造商全稱:Texas Instruments 功能描述:System Power Management and Protection IC with PMBusa?￠ |
| LM25066APSQX/NOPB | 功能描述:熱插拔功率分布 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| LM25066EVK/NOPB | 功能描述:電源管理IC開發(fā)工具 LM25066 EVAL BOARD RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| LM25066IAPSQ/NOPB | 制造商:Texas Instruments 功能描述:IC PWR MGMT/PROT PMBUS 24WQFN 制造商:Texas Instruments 功能描述:System PWR Mgmt & Protection IC |
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