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參數(shù)資料
| 型號： | LM25066APSQE |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, QCC24 |
| 封裝： | LLP-24 |
| 文件頁數(shù)： | 18/48頁 |
| 文件大小： | 1658K |
| 代理商： | LM25066APSQE |
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30146052
FIGURE 15. Adding Delay to the Power Good Output Pin
SYSTEM CONSIDERATIONS
A) Continued proper operation of the LM25066A hot swap
circuit normally dictates that capacitance be present on the
supply side of the connector into which the hot swap circuit is
plugged in, as depicted in Figure 16. The capacitor in the
“LIVE POWER SOURCE” section is necessary to absorb the
voltage transient generated whenever the hot swap circuit
shuts off the load current. If the capacitance is not present,
parasitic inductance of the supply lines will generate a voltage
transient at shut-off which may exceed the absolute maximum
rating of the LM25066A, resulting in its destruction. A TVS
device with appropriate voltage and power ratings can also
be connected from VIN to GND to clamp the voltage spike
(see application note AN-2100).
B) If the load powered by the LM25066A hot swap circuit has
inductive characteristics, a Schottky diode is required across
the LM25066A’s output along with some load capacitance.
The capacitance and the diode are necessary to limit the
negative excursion at the OUT pin when the load current is
shut off. If the OUT pin transitions more than 0.3V negative,
the LM25066A will internally reset, erasing the volatile setting
for retries and warning thresholds. See Figure 16. Also, rapid
slew rates on VOUT can couple into the LM25066A's GATE
pin and create negative voltage excursions at this pin. To al-
leviate this, a small gate resistance (e.g. 10
) can be used.
This resistor has the added benefit of reducing very high fre-
quency gate voltage oscillations, particularly in paralleled
FET arrangements.
30146054
FIGURE 16. Output Diode Required for Inductive Loads
PC BOARD GUIDELINES
The following guidelines should be followed when designing
the PC board for the LM25066A:
- Place the LM25066A close to the board’s input connector to
minimize trace inductance from the connector to the MOS-
FET.
- Place a small capacitor, C
IN (1nF), directly adjacent to the
VIN and GND pins of the LM25066A to help minimize tran-
sients which may occur on the input supply line. Transients of
several volts can easily occur when the load current is shut
off. ASIDE: note that if the current drawn by such capacitor
following a hot-plug event is deemed unacceptable, input
voltage spike transients can be appropriately minimized by
proper placement of a TVS device and operation without this
C
IN capacitor becomes feasible.
- Place a 1 F ceramic capacitor as close as possible to VREF
pin.
- Place a 1 F ceramic capacitor as close as possible to VDD
pin.
- The sense resistor (R
S) should be placed close to the
LM25066A. In particular, the trace to the VIN pin should be
made as low resistance as practical to ensure maximum cur-
rent and power measurement accuracy. Connect R
S using the
Kelvin techniques shown in Figure 7.
25
www.national.com
LM25066A
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM25066APSQE/NOPB | 功能描述:熱插拔功率分布 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| LM25066APSQX | 制造商:TI 制造商全稱:Texas Instruments 功能描述:System Power Management and Protection IC with PMBusa?￠ |
| LM25066APSQX/NOPB | 功能描述:熱插拔功率分布 RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| LM25066EVK/NOPB | 功能描述:電源管理IC開發(fā)工具 LM25066 EVAL BOARD RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| LM25066IAPSQ/NOPB | 制造商:Texas Instruments 功能描述:IC PWR MGMT/PROT PMBUS 24WQFN 制造商:Texas Instruments 功能描述:System PWR Mgmt & Protection IC |
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