參數(shù)資料
型號: KXPC8240LVV200E
廠商: Freescale Semiconductor
文件頁數(shù): 34/52頁
文件大?。?/td> 0K
描述: IC MPU INTEGRATED 250MHZ 352TBGA
標準包裝: 2
系列: MPC82xx
處理器類型: 32-位 MPC82xx PowerQUICC II
速度: 200MHz
電壓: 2.5V
安裝類型: 表面貼裝
封裝/外殼: 352-LBGA
供應商設備封裝: 352-TBGA(35x35)
包裝: 托盤
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MPC8240 Integrated Processor Hardware Specifications
Features
– Address translation unit
– Some internal configuration registers accessible from PCI
— Two-channel integrated DMA controller (writes to ROM/Port X not supported)
– Supports direct mode or chaining mode (automatic linking of DMA transfers)
– Supports scatter gathering—Read or write discontinuous memory
– Interrupt on completed segment, chain, and error
– Local-to-local memory
– PCI-to-PCI memory
– PCI-to-local memory
– PCI memory-to-local memory
— Message unit
– Two doorbell registers
– Two inbound and two outbound messaging registers
–I2O message controller
—I2C controller with full master/slave support (except broadcast all)
— Programmable interrupt controller (PIC)
– Five hardware interrupts (IRQs) or 16 serial interrupts
– Four programmable timers
— Integrated PCI bus, CPU, and SDRAM clock generation
— Programmable PCI bus, 60x, and memory interface output drivers
Dynamic power management—Supports 60x nap, doze, and sleep modes
Programmable input and output signals with watchpoint capability
Built-in PCI bus performance monitor facility
— Debug features
– Memory attribute and PCI attribute signals
– Debug address signals
–MIV signal—Marks valid address and data bus cycles on the memory bus
– Error injection/capture on data path
– IEEE 1149.1 (JTAG)/test interface
Processor core interface
— High-performance, superscalar processor core
— Integer unit (IU), floating-point unit (FPU) (software enabled or disabled), load/store unit
(LSU), system register unit (SRU), and a branch processing unit (BPU)
— 16-Kbyte instruction cache
— 16-Kbyte data cache
— Lockable L1 cache, entire cache or on a per-way basis
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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