參數(shù)資料
型號： JTSX8388B-1V1B
英文描述： A/D CONVERTER
中文描述： 的A / D轉(zhuǎn)換器
文件頁數(shù)： 6/45頁
文件大?。?/td> 1597K
代理商： JTSX8388B-1V1B
6
JTS8388B
Product Specification
Parameter
Symb
Temp
Test
level
Min
Typ
Max
Unit
DIGITAL OUTPUTS
(
notes 1,6
)
Single ended or differential input mode, 50 % clock duty cycle (CLK,CLKB), Binary output data format,
Tj (typical) = 70
°
C. Full temperature range : up to -55
°
C < Tj ; Tj < +125
°
C.
Logic compatibility for digital outputs
( Depending on the value of V
PLUSD
)
(see Application Notes)
ECL or LVDS
Differential output voltage swings ( assuming V
PLUSD
= 0V) :
75
open transmission lines ( ECL levels )
75
differentially terminated
50
differentially terminated
Full
IV
1.50
0.70
0.54
1.620
0.825
0.660
V
V
V
Output levels ( assuming V
PLUSD
= 0V)
75
open transmission lines
(note 6)
25
°
C
IV
Logic “0” voltage
V
OL
-1.62
-1.54
V
Logic “1” voltage
V
OH
-0.88
-0.8
V
Output levels ( assuming V
PLUSD
= 0V)
75
differentially terminated
(note 6)
25
°
C
IV
Logic “0” voltage
V
OL
-1.41
-1.34
V
Logic “1” voltage
V
OH
-1.07
-1
V
Output levels ( assuming V
PLUSD
= 0V)
50
differentially terminated
(note 6)
25
°
C
II
Logic “0” voltage
V
OL
-1.45
-1.32
V
Logic “1” voltage
V
OH
-1.20
-1.15
V
Differential Output Swing
DOS
Full
VI
250
290
mV
Output level drift with temperature
Full
IV
1.6
mV/
°
C
DC ACCURACY
Single ended or differential input mode, 50 % clock duty cycle (CLK,CLKB), Binary output data format,
Tj (typical) = 70
°
C. Full temperature range :-55
°
C < Tc ; Tj < +125
°
C.
Differential non linearity
(notes 2,3)
DNL
Full
I
VI
0.35
0.45
0.6
0.7
LSB
LSB
Integral non linearity
(notes 2,3)
INL
Full
I
VI
0.7
0.9
1
1.2
LSB
LSB
No missing codes
(note 3)
Full
Guaranteed over specified temperature range
Gain error
Full
I
VI
-10
-11
-2
-2
10
11
% FS
% FS
Input offset voltage
Full
I
VI
-26
-30
-5
-5
26
30
mV
mV
Gain error drift
Offset error drift
Full
Full
IV
IV
100
40
125
50
150
60
ppm/
°
C
ppm/
°
C
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