參數(shù)資料
型號(hào)： JTSX8388B-1V1B
英文描述： A/D CONVERTER
中文描述： 的A / D轉(zhuǎn)換器
文件頁數(shù)： 13/45頁
文件大?。?/td> 1597K
代理商： JTSX8388B-1V1B
JTS8388B
13
Product Specification
4.
PACKAGE DESCRIPTION.
4.1.
JTS8388B PIN DESCRIPTION
Symbol
Pin number
Function
GND
20, 24, 26, 28, 33, 35, 37
Analog ground.
Pads n°20, 24,26,28,37 are double.
Pads n°26,33,35 are single.
14 bonding wires are available for analog ground access.
V
PLUSD
1, 11
Digital positive supply. (0V for ECL compatibility, +2.4V for LVDS
compatibility).
2 double pads
(note 3)
V
CC
19, 21, 23, 30, 39, 40
+5 V positive supply.
V
EE
22, 29, 31
-5 V analog supply.
DV
EE
6
-5 V digital supply.
V
IN
34
In phase (+) analog input signal of the Sample and Hold
differential preamplifier.
V
INB
36
Inverted phase (-) of analog input signal.
CLK
25
In phase (+) ECL clock input.
CLKB
27
Inverted phase (-) of ECL clock input.
D0, D1, D2, D3, D4, D5, D6,
D7
16, 14, 12, 9, 4, 2, 45, 43
In phase (+) digital outputs.
D0 is the LSB. D7 is the MSB.
D0B, D1B, D2B, D3B, D4B,
D5B, D6B, D7B
17, 15, 13, 10, 5, 3, 46, 44
Inverted phase (-) Digital outputs.
B0B is the inverted LSB. D7B is the inverted MSB.
OR
41
In phase (+) Out of Range Output.
Out of Range goes high on the leading edge of code 0 and code
256.
ORB
42
Inverted phase (+) of Out of Range Bit (OR).
DR
7
In phase (+) output of Data Ready Signal.
DRB
8
Inverted phase (-) output of Data Ready Signal.
GORB
18
Gray or Binary select output format control pad.
– Binary output format if GORB is floating or V
CC
.
– Gray output format if GORB is connected at ground (0 V).
GAIN
38
ADC gain adjust pin.
DIOD/DRRB
32
DIOD : die junction temperature measurement pad.
Can be left floating or grounded if not used.
DRRB : asynchronous data ready reset function
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