參數(shù)資料
型號: JTSX8388B-1V1B
英文描述: A/D CONVERTER
中文描述: 的A / D轉(zhuǎn)換器
文件頁數(shù): 36/45頁
文件大?。?/td> 1597K
代理商: JTSX8388B-1V1B
36
JTS8388B
Product Specification
7.8.
OUT OF RANGE BIT
An Out of Range (OR,ORB) bit is provided that goes to logical high state when the input exceeds the positive full scale or falls below the negative full
scale.
When the analog input exceeds the positive full scale, the digital output datas remain at high logical state, with (OR,ORB) at logical one.
When the analog input falls below the negative full scale, the digital outputs remain at logical low state, with (OR,ORB) at logical one again.
7.9.
GRAY OR BINARY OUTPUT DATA FORMAT SELECT
The JTS8388B internal regeneration latches indecision (for inputs very close to latches threshold) may produce errors in the logic encoding circuitry
and leading to large amplitude output errors.
This is due to the fact that the latches are regenerating the internal analog residues into logical states with a finite voltage gain value (Av) within a
given positive amount of time
(t) :
Av= exp(
(t)/
τ
) , with
τ
the positive feedback regeneration time constant.
The JTS8388B has been designed for reducing the probability of occurence of such errors to approximately 10
-13
(targetted for the JTS8388B at
1GSPS).
A standard technique for reducing the amplitude of such errors down to +/-1 LSB consists to output the digital datas in Gray code format.
Though the JTS8388B has been designed for featuring a Bit Error Rate of 10
with a binary output format, it is possible for the user to select
between the Binary or Gray output data format, in order to reduce the amplitude of such errors when occuring, by storing Gray output codes.
Digital Datas format selection :
BINARY output format if GORB is floating or VCC.
GRAY output format if GORB is connected to ground (0V).
7.10. TS8388 B THERMAL REQUIREMENTS
The JTS8388B is currently mounted on its dedicated Chip Evaluation Board (CEB), with fulfills the device thermal requirements in still air at room
temperature.
For operation in the military temperature range, forced convection is required to maintain the device junction temperature below the specified
maximum value.
The JTS8388B power dissipation is 3.6 Watt at 70°C junction temperature, and 3.8 Watt at 125°C junction temperature. The die dimensions are 2.44
mm x 3 mm = 7.32 mm2.
The maximum junction temperature is 145°C.
To manage correctly the power dissipation of the JTS8388B device, the following thermal fixture profile is used, taking into account the die
dimensions and power dissipation :
7.5 C°/W typical value for die attach Ag filled Epoxy glue, but depending on gllue film thickness.
0.5 C°/W Copper block.
1 C°/W isolation foil.
6.5 C°/W heatsink (still air).
The heatsink used is the 3334B pin fin heatsink from Thermalloy, (also used cooling the 604 Power PC μP). Its dimensions are 50.70 mm x 50.39
mm = (1.996 inch x 1.984 inch x 0.650 inch).
The measured die junction to ambient thermal resistance (RTHJA) for the Chip Evaluation Board is approximately 15.5 C/W in still air.
At room temperature (25°C), this yields to a device junction temperature of approximately 80°C, in thermal steady state conditions.
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