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參數資料
| 型號： | HT83R074 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | Q-Voice |
| 中文描述： | 調Q語音 |
| 文件頁數： | 8/38頁 |
| 文件大小： | 252K |
| 代理商： | HT83R074 |
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HT83R074
Rev. 1.00
8
May 17, 2007
Mode
Program Counter
*10
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
Initial Reset
0
0
0
0
0
0
0
0
0
0
0
Time Base Overflow
0
0
0
0
0
0
0
0
1
0
0
Timer Counter 0 Overflow
0
0
0
0
0
0
0
1
0
0
0
Timer Counter 1 Overflow
0
0
0
0
0
0
0
1
1
0
0
Skip
Program Counter+2
Loading PCL
*10
*9
*8
@7
@6
@5
@4
@3
@2
@1
@0
Jump, Call Branch
#10
#9
#8
#7
#6
#5
#4
#3
#2
#1
#0
Return from Subroutine
S10
S9
S8
S7
S6
S5
S4
S3
S2
S1
S0
Program Counter
Note: *10~*0: Program counter bits
S10~S0: Stack register bits
#10~#0: Instruction code bits
@7~@0: PCL bits
*
+
-
*
+
-
*
+
-
;
" %
% 7
9
@
%
% 7
( 9
;
" %
% 7
A
9
@
%
% 7
9
;
" %
% 7
A * 9
@
%
% 7
A
9
A
A *
%
0
:
Execution Flow
Functional Description
Execution Flow
The system clock for the HT83R074 is derived from ei-
ther a crystal or RC oscillator. It is internally divided into
four non-overlapping clocks. One instruction cycle con-
sists of four system clock cycles.
Instruction fetching and execution are pipelined in such
a way that a fetch takes one instruction cycle while de-
coding and execution takes the next instruction cycle.
However, the pipelining scheme causes each instruc-
tion to effectively execute within one cycle. If an instruc-
tion changes the Program Counter, two cycles are
required to complete the instruction.
Program Counter
PC
The 11-bit program counter (PC) controls the sequence
in which the instructions stored in program ROM are ex-
ecuted.
After accessing a program memory word to fetch an in-
struction code, the contents of the program counter are
incremented by one. The program counter then points
to the memory word containing the next instruction
code.
When executing a jump instruction, conditional skip ex-
ecution, loading PCL register, subroutine call, initial re-
set, internal interrupt or return from subroutine, the PC
manipulates the program transfer by loading the ad-
dress corresponding to each instruction.
The conditional skip is activated by instruction. Once the
condition is met, the next instruction, fetched during the
current instruction execution, is discarded and a dummy
cycle takes its place while the correct instruction is ob-
tained.
The lower byte of the program counter (PCL) is a
read/write register (06H). Moving data into the PCL per-
forms a short jump. The destination must be within 256
locations.
When a control transfer takes place, an additional
dummy cycle is required.
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