參數(shù)資料
型號(hào)： HT46R23
廠商： Holtek Semiconductor Inc.
英文描述： 8-Bit OTP Microcontroller
中文描述： 8位微控制器檢察官辦公室
文件頁(yè)數(shù)： 14/42頁(yè)
文件大?。?/td> 1172K
代理商： HT46R23
HT46R23
Rev. 1.30
14
August 17, 2001
Register
Rese t(Power On)
WDT Time-out
(Normal Operation)
RES Reset
(Normal Operation)
RES Rese
(HALT)
WDT Time-out
(HALT)*
ADRL
xx-- ----
xx-- ----
xx-- ----
xx-- ----
uu-- ----
ADRH
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
uuuu uuuu
ADCR
0100 0000
0100 0000
0100 0000
0100 0000
uuuu uuuu
ACSR
1--- --00
1--- --00
1--- --00
--- --00
u--- --uu
Note:
* stands for warm reset
u stands for unchanged
x stands for unknown
Timer/Event Counter
A timer/event counter (TMR) is implemented in the
microcontroller. The timer/event counter contains an
16-bitprogrammablecount-upcounterandtheclockmay
come from an external source or the system clock.
Using the internal system clock, there is only one refer-
ence time-base. The internal clock source comes from
f
SYS
. The external clock input allows the user to count
external events, measure time intervals or pulse widths,
or to generate an accurate time base.
There are three registers related to the timer/event coun-
ter; TMRH (0CH), TMRL (0DH), TMRC (0EH). Writing
TMRL will only put the written data to an internal
lower-order byte buffer (8 bits) and writing TMRH will
transfer the specified data and the contents of the
lower-order byte buffer to TMRH and TMRL preload regis-
ters,respectively.Thetimer/eventcounterpreloadregister
is changed by each writing TMRH operations. Reading
TMRH will latch the contents of TMRH and TMRL coun-
ters to the destination and the lower-order byte buffer, re-
spectively. Reading the TMRL will read the contents of the
lower-order byte buffer. The TMRC is the timer/event
counter control register, which defines the operating
mode, counting enable or disable and active edge.
The TM0, TM1 bits define the operating mode. The event
count mode is used to count external events, which means
the clock source comes from an external (TMR) pin. The
timer mode functions as a normal timer with the clock
source coming from the f
INT
clock. The pulse width mea-
surement mode can be used to count the high or low level
durationoftheexternalsignal(TMR).Thecountingisbased
on the f
INT
.
In the event count or timer mode, once the timer/event
counter starts counting, it will count from the current con-
tents in the timer/event counter to FFFFH. Once overflow
occurs, the counter is reloaded from the timer/event coun-
ter preload register and generates the interrupt request
flag (TF; bit 5 of INTC0) at the same time.
In the pulse width measurement mode with the TON
and TE bits equal to one, once the TMR has received a
transient from low to high (or high to low if the TE bits is
0 ) it will start counting until the TMR returns to the orig-
inal level and resets the TON. The measured result will
remain in the timer/event counter even if the activated
transient occurs again. In other words, only one cycle
measurement can be done. Until setting the TON, the
cycle measurement will function again as long as it re-
ceives further transient pulse. Note that, in this operat-
ing mode, the timer/event counter starts counting not
according to the logic level but according to the transient
edges. In the case of counter overflows, the counter is
reloaded from the timer/event counter preload register
and issues the interrupt request just like the other two
modes. To enable the counting operation, the timer ON
bit (TON; bit 4 of TMRC) should be set to 1. In the pulse
width measurement mode, the TON will be cleared au-
tomatically after the measurement cycle is completed.
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Timer/Event Counter
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