參數(shù)資料
型號(hào)： HSP50415EVAL1
廠商： Intersil Corporation
英文描述： HSP50415EVAL1 Evaluation Kit
中文描述： HSP50415EVAL1評(píng)估板
文件頁(yè)數(shù)： 8/29頁(yè)
文件大?。?/td> 229K
代理商： HSP50415EVAL1
4-8
The Lock Detector compares the magnitude of the
phaseError to a programmable 21-bit threshold value. If the
carry out from this comparison is “1” then the phaseError is
greater than or equal to the threshold value and a negative
value is added to the lock integrator. If the carry out is “0”
then the phaseError is less than the threshold and a positive
value is added. As the phaseError magnitude stays below
the threshold level the lock integrator will grow from a
negative number to a positive one thus indicating a locked
condition. The lock integrator resets to a full-scale negative
value. The sign bit of the lock integrator is output as the
LOCKDET status flag. The values added or subtracted to
the lock integrator are user selectable as follows in Table 2.
FIGURE 2. PHASE/FREQUENCY ERROR DETECTOR
FIGURE 3. DPLL LOOP FILTER
FIGURE 4. LOCK DETECTION BLOCK DIAGRAM
REFCLK divider<7:0>
NCO divider<13:0>
carryOut
8 upper bits of phaseAccum
14-bit countValue
enable
freqError<15:0>
phaseError<21:0>
FIFOFreqError<8*7,7:0>
8-BIT
COUNTER
SYNC
R
R
SYMBOL NCO
REFCLK
CLK
TC
_
14-BIT
COUNTER
UL<31:0>
LL<13:0>
phaseError<21:0>
freqError<15:0>
frequencyGain
lagGain
leadGain
LIMITER
R
R
41
/
DPLL
PhincError<31:0>
phaseErrorMag<20:0>
threshold<20:0>
useAPLLlockStatus
analogPLLlockStatus
carryOut
lockIntegrator<8:0>
negative notLockedValue
positive lockedValue
bit=1 indicates phaseErr > thld so NOT
locked
lockIntegrator<8>
LOCKDET
A1
S
AO
Z
R
A1
S
AO
Z
_
TABLE 2. LOCK INTEGRATOR ADDENDS
LOCK
FACTOR
CARRY OUT
ADDEND
BINARY
VALUE
0xx
1
-0.5
111111000
1xx
1
-0.25
111111100
x00
0
+0.0625
000000001
x01
0
+0.1250
000000010
x10
0
+0.2500
000000100
x11
0
+0.5000
000001000
HSP50415
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