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參數(shù)資料
| 型號： | HSP50415EVAL1 |
| 廠商： | Intersil Corporation |
| 英文描述： | HSP50415EVAL1 Evaluation Kit |
| 中文描述： | HSP50415EVAL1評估板 |
| 文件頁數(shù)： | 25/29頁 |
| 文件大?。?/td> | 229K |
| 代理商： | HSP50415EVAL1 |
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4-25
Power Consumption
The HSP50415 power consumption is as shown in
Figure 21.
Evaluation Kit
The HSP50415EVAL1 is an evaluation kit for the HSP50415
wideband programmable modulator. The kit consists of an
evaluation Circuit Card Assembly complete with the
HSP50415 device and additional circuitry to provide for
control via a computer parallel port. Windows based
demonstration software is provided for full user
programmability and control of all HSP50415 operational
modes. Documentation includes a user’s manual, full
evaluation board schematics and PCB layout materials.
TABLE 28. FIFO RESET STROBE
ADDRESS = 0E
H
BIT NO.
DESCRIPTION
RESET STATE
NA
Writing to control word 0x0E generates an internal FIFOReset strobe that resets the FIFO address
pointers and flags.
0
TABLE 29. MEMORY BUFFER UPDATE STROBE
ADDRESS = 0F
H
BIT NO.
DESCRIPTION
RESET STATE
NA
Writing to control word 0x0F generates an internal memBuf update strobe that downloads the
appropriate MasterReg byte to the memory Buffer.
0
TABLE 30. SOFT RESET SIGNAL
ADDRESS = 10
H
BIT NO.
DESCRIPTION
RESET STATE
NA
Writing to uPI address space 4 with CDATA<7:0> = 0x10 forces the internal soft Reset signal active. The
soft Reset stays active until different CDATA<7:0> other than 0x10 is written to address space 4.
0
TABLE 31. SHAPING FIR ROUNDING AND BALANCE
ADDRESS = 11
H
BIT NO.
DESCRIPTION
RESET STATE
19
I/Q FIR preLoad<18:0> filter seed value.
0
TABLE 32. FIFO DATA WRITE STROBE
ADDRESS = 12
H
BIT NO.
DESCRIPTION
RESET STATE
NA
Strobe used to enable writes to FIFO - data from DIN<15:0.>, ISTRB interface.
0
FIGURE 21. POWER CONSUMPTION vs CLK FREQUENCY
1250
1200
1150
1100
1050
1000
950
900
850
800
750
70050
55
60
65
70
75
80
85
90
95
100
CLK FREQUENCY (MHz)
P
V
DD
= 3.3V
DC
WORST CASE
SHAPING FILTER OFF
HALF BAND OFF
INTERPOLATION OFF
HSP50415
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HSP9501 | Programmable Data Buffer(可編程數(shù)據(jù)緩沖器) |
| HSP9520 | Multilevel Pipeline Registers |
| HSP9520CP | Multilevel Pipeline Registers |
| HSP9520CS | Multilevel Pipeline Registers |
| HSP9521 | Multilevel Pipeline Registers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HSP50415VI | 功能描述:調(diào)節(jié)器/解調(diào)器 100MQFP, -40+85C,PROGRAMABLE MODULATOR RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
| HSP50415VIZ | 功能描述:調(diào)節(jié)器/解調(diào)器 W/ANL 100MQFP-40+85C PROGRAMABLE MODLTR RoHS:否 制造商:Texas Instruments 封裝 / 箱體:PVQFN-N24 封裝:Reel |
| HSP50A | 制造商:JLWORLD 制造商全稱:JLWORLD 功能描述:SPEAKER SOUND GENERATORS |
| HSP50B | 制造商:JLWORLD 制造商全稱:JLWORLD 功能描述:SPEAKER SOUND GENERATORS |
| HSP50SA8 | 制造商:RDI 功能描述:SPEAKER 2 ROUND 8 OHMS CLEAR FACE |
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