HMS81C43xx / GMS87C4060
98
November 2001 ver 1.2
4. Bit Manipulation
5. Branch / Jump Operation
5
6
7
LDYA dp
STYA dp
SUBW dp
7D
DD
3D
2
2
2
5
5
5
Load YA : YA
←
(dp+1)(dp)
Store YA : (dp+1)(dp)
←
YA
16-bits substract without carry : YA
←
YA - (dp+1)(dp)
N - - - - - Z -
- - - - - - - -
NV - - H - ZC
NO.
MNENONIC
OP
CODE
BYTE
NO.
CYCLE
NO
OPERATION
FLAG
NVGBHIZC
NO.
MNENONIC
OP
CODE
BYTE
NO.
CYCLE
NO
OPERATION
FLAG
NVGBHIZC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
AND1 M.bit
AND1B M.bit
BIT dp
BIT !abs
CLR1 dp.bit
CLR1A A.bit
CLRC
CLRG
CLRV
EOR1 M.bit
EOR1B M.bit
LDC M.bit
LDCB M.bit
NOT1 M.bit
OR1 M.bit
OR1B M.bit
SET1 dp.bit
SETA1 A.bit
SETC
SETG
STC M.bit
TCLR1 !abs
8B
8B
0C
1C
y1
2B
20
40
80
AB
AB
CB
CB
4B
6B
6B
x1
0B
A0
C0
EB
5C
3
3
2
3
2
2
1
1
1
3
3
3
3
3
3
3
2
2
1
1
3
3
4
4
4
5
4
2
2
2
2
5
5
4
4
5
5
5
4
2
2
2
6
6
Bit AND C-flag : C
←
C ^ (M.bit)
Bit AND C-flag and NOT : C
←
C ^ ~(M.bit)
Bit test A with memory :
Z
←
A ^ M, N
←
(M
7
), V
←
(M
6
)
Clear bit : (M.bit)
←
“0”
Clear A.bit : (A.bit)
←
“0”
Clear C-flag : C
←
“0”
Clear G-flag : G
←
“0”
Clear V-flag : V
←
“0”
Bit exclusive-OR C-flag : C
←
C
⊕
(M.bit)
Bit exclusive-OR C-flag and NOT : C
←
C
⊕ ~
(M.bit)
Load C-flag : C
←
(M.bit)
Load C-flag with NOT : C
←
~(M.bit)
Bit complement : (M.bit)
←
~(M.bit)
Bit OR C-flag : C
←
C V (M.bit)
Bit OR C-flag and NOT : C
←
C V ~(M.bit)
Set bit : (M.bit)
←
“1”
Set A.bit : (A.bit)
←
“1”
Set C-flag : C
←
“1”
Set G-flag : G
←
“1”
Store C-flag : (M.bit)
←
C
Test and clear bits with A :
A - (M), (M)
←
(M) ^ ~(A)
Test and set bits with A :
A - (M), (M)
←
(M) V (A)
- - - - - - - C
- - - - - - - C
MM - - - - Z -
- - - - - - - -
- - - - - - - -
- - - - - - - 0
- - 0 - - - - -
- 0 - - 0 - - -
- - - - - - - C
- - - - - - - C
- - - - - - - C
- - - - - - - C
- - - - - - - -
- - - - - - - C
- - - - - - - C
- - - - - - - -
- - - - - - - -
- - - - - - - 1
- - 1 - - - - -
- - - - - - - -
N - - - - - Z -
23
TSET1 !abs
3C
3
6
N - - - - - Z -
NO.
MNENONIC
OP
CODE
BYTE
NO.
CYCLE
NO
OPERATION
FLAG
NVGBHIZC
1
2
3
4
BBC A.bit,rel
BBC dp.bit,rel
BBS A.bit,rel
BBS dp.bit,rel
y2
y3
x2
x3
2
3
2
3
4/6
5/7
4/6
5/7
Branch if bit clear :
if(bit) = 0, then PC
←
PC + rel
Branch if bit clear :
if(bit) = 1, then PC
←
PC + rel
Branch if carry bit clear :
if(C) = 0, then PC
←
PC + rel
Branch if carry bit set : If (C) =1, then PC
←
PC + rel
Branch if equal : if (Z) = 1, then PC
←
PC + rel
Branch if munus : if (N) = 1, then PC
←
PC + rel
Branch if not equal : if (Z) = 0, then PC
←
PC + rel
Branch if not minus : if (N) = 0, then PC
←
PC + rel
Branch always : PC
←
PC + rel
Branch if overflow bit clear :
If (V) = 0, then PC
←
PC + rel
Branch if overflow bit set :
If (V) = 1, then PC
←
PC + rel
- - - - - - - -
- - - - - - - -
5
BCC rel
50
2
2/4
MM - - - - Z -
6
7
8
9
10
11
12
BCS rel
BEQ rel
BMI rel
BNE rel
BPL rel
BRA rel
BVC rel
D0
F0
90
70
10
2F
30
2
2
2
2
2
2
2
2/4
2/4
2/4
2/4
2/4
4
2/4
- - - - - - - -
- - - - - - - -
- - - - - - - -
- - - - - - - -
- - - - - - - -
- - - - - - - -
- - - - - - - -
13
BVS rel
B0
2
2/4
- - - - - - - -