- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370643 > HMS30C7110 (Electronic Theatre Controls, Inc.) Multipurpose Network Processor PDF資料下載
參數(shù)資料
| 型號： | HMS30C7110 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | 網(wǎng)絡(luò)處理器 |
| 英文描述： | Multipurpose Network Processor |
| 中文描述： | 多功能網(wǎng)絡(luò)處理器 |
| 文件頁數(shù)： | 44/161頁 |
| 文件大小： | 973K |
| 代理商： | HMS30C7110 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁當(dāng)前第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁
HMS30C7110
2003 MagnaChip Semiconductor Ltd. All Rights Reserved
Version 1.5
44
used with care. For example, write to control registers may require the
“read again” the same address to flush the write buffer.
11:6
RW
0x0
Specify the set to invalid or flush (write back) – 0 to 63
5:4
RW
0x0
Specify the way to invalid or flush (write back) – 0 to 3
3
W
0x0
Line flush (write back)
This bit flushes (write back) a cache line (4 words) corresponding to a
specific way and a set specified in bit [5:4] and [11:6], respectively. It
checks the dirty bit of a given line, write back if necessary, and then
clears the valid bit. This should be activated only when the cache is off.
This bit is automatically cleared to 0 as soon as the write back finishes.
(Actually when cache is off, it finishes immediately even before to
execute the next following instruction.) This bit is used for the
consistency between the cache and the main memory after the cache is
off – i.e., writes the contents of the cache if they are different (new) from
those of main memory (old).
2
W
0x0
Line invalidate
This bit invalidates a cache line (4 words) corresponding to a specific
way and a set specified in bit [5:4] and [11:6], respectively. This clears
the valid bit of a given line without writing the contents of the line to
main memory. This should be activated only when the cache is off. This
bit is automatically cleared to 0 as soon as the invalidation finishes.
(Actually when cache is off, invalidation finishes immediately even
before to execute the next following instruction.)
1
RW
0x0
Parallel/Sequential control (0 – parallel, 1 – sequential)
This bit controls the access sequence of tag RAM and data RAM.
Parallel access of tag RAM and data RAM is for high performance,
while sequential access is for low power operations.
0
RW
0x0
Cache on/off (0 – off, 1 – on)
This bit controls the on and off the cache. After reset, all the valid bits of
cache are cleared to 0. So there are no required procedures to turn on the
cache in the initial state. However, there should be some caution when
turn off the cache since even if the cache is turned off, all the operations
of the cache except the line fill is performed as usual. For example, a
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HMS30C2000 | [Application Specific Solution Product] |
| HMS30C7210 | ARM Based 32-Bit Microprocessor |
| HMS30C7080 | Mobile Phone Camera Back-End Processor |
| HMS30C7202 | 32-bit ARM7TDMI RISC static CMOS CPU core |
| HMS30C7202N | Highly-intergrated MPU |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HMS30C7202 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:32-bit ARM7TDMI RISC static CMOS CPU core |
| HMS30C7202N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Highly-intergrated MPU |
| HMS30C7210 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ARM Based 32-Bit Microprocessor |
| HMS3224M3 | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:SRAM MODULE 768KBit (32K x 24-Bit) |
| HMS3224M3-10 | 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:SRAM MODULE 768KBit (32K x 24-Bit) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。